Commit 381cae16 authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Geert Uytterhoeven
Browse files

riscv: only select DMA_DIRECT_REMAP from RISCV_ISA_ZICBOM and ERRATA_THEAD_PBMT 



RISCV_DMA_NONCOHERENT is also used for whacky non-standard
non-coherent ops that use different hooks in dma-direct.

Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarRobin Murphy <robin.murphy@arm.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: default avatarSamuel Holland <samuel.holland@sifive.com>
Link: https://lore.kernel.org/r/20231018052654.50074-3-hch@lst.de


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent fd962781

arch/riscv/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -273,7 +273,6 @@ config RISCV_DMA_NONCOHERENT 
	select ARCH_HAS_SYNC_DMA_FOR_CPU

	select ARCH_HAS_SYNC_DMA_FOR_DEVICE

	select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB

	select DMA_DIRECT_REMAP if MMU



config RISCV_NONSTANDARD_CACHE_OPS

	bool
@@ -549,6 +548,7 @@ config RISCV_ISA_ZICBOM 
	depends on RISCV_ALTERNATIVE

	default y

	select RISCV_DMA_NONCOHERENT

	select DMA_DIRECT_REMAP

	help

	   Adds support to dynamically detect the presence of the ZICBOM

	   extension (Cache Block Management Operations) and enable its

arch/riscv/Kconfig.errata

+1 −0
Original line number Diff line number Diff line
@@ -77,6 +77,7 @@ config ERRATA_THEAD_PBMT 
config ERRATA_THEAD_CMO

	bool "Apply T-Head cache management errata"

	depends on ERRATA_THEAD && MMU

	select DMA_DIRECT_REMAP

	select RISCV_DMA_NONCOHERENT

	default y

	help