Commit 388df379 authored by Cheng-Chieh Hsieh's avatar Cheng-Chieh Hsieh Committed by Kalle Valo
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wifi: rtw89: move software DCFO compensation setting to proper position 



We need this register setting only for the software DCFO(digital carrier
frequency offset) compensation so we move it to the proper position to
prevent the incorrect setting.

Signed-off-by: default avatarCheng-Chieh Hsieh <cj.hsieh@realtek.com>
Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231016065115.751662-6-pkshih@realtek.com
parent aecc60e7

drivers/net/wireless/realtek/rtw89/phy.c

+4 −3
Original line number Diff line number Diff line
@@ -2588,14 +2588,16 @@ static void rtw89_dcfo_comp_init(struct rtw89_dev *rtwdev) 
	rtw89_phy_set_phy_regs(rtwdev, cfo->comp, cfo->weighting_mask, 8);



	if (chip->chip_gen == RTW89_CHIP_AX) {

		if (chip->cfo_hw_comp)

		if (chip->cfo_hw_comp) {

			rtw89_write32_mask(rtwdev, R_AX_PWR_UL_CTRL2,

					   B_AX_PWR_UL_CFO_MASK, 0x6);

		else

		} else {

			rtw89_phy_set_phy_regs(rtwdev, R_DCFO, B_DCFO, 1);

			rtw89_write32_clr(rtwdev, R_AX_PWR_UL_CTRL2,

					  B_AX_PWR_UL_CFO_MASK);

		}

	}

}



static void rtw89_phy_cfo_init(struct rtw89_dev *rtwdev)

{
@@ -2617,7 +2619,6 @@ static void rtw89_phy_cfo_init(struct rtw89_dev *rtwdev) 
	rtw89_debug(rtwdev, RTW89_DBG_CFO, "Default xcap=%0x\n",

		    cfo->crystal_cap_default);

	rtw89_phy_cfo_set_crystal_cap(rtwdev, cfo->crystal_cap_default, true);

	rtw89_phy_set_phy_regs(rtwdev, R_DCFO, B_DCFO, 1);

	rtw89_dcfo_comp_init(rtwdev);

	cfo->cfo_timer_ms = 2000;

	cfo->cfo_trig_by_timer_en = false;