Commit 38c5854a authored by Suraj Kandpal's avatar Suraj Kandpal
Browse files

drm/i915/dpll: Rename intel_[enable/disable]_dpll 



Rename  intel_[enable/disable]_dpll to intel_dpll_[enable/disable]
in an effort to make sure all functions that are exported
start with the filename.

Signed-off-by: default avatarSuraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://lore.kernel.org/r/20250515071801.2221120-10-suraj.kandpal@intel.com
parent 7e9a4cbb

drivers/gpu/drm/i915/display/intel_display.c

+2 −2
Original line number Diff line number Diff line
@@ -1664,7 +1664,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, 
	intel_encoders_pre_pll_enable(state, crtc);



	if (new_crtc_state->intel_dpll)

		intel_enable_dpll(new_crtc_state);

		intel_dpll_enable(new_crtc_state);



	intel_encoders_pre_enable(state, crtc);
@@ -1793,7 +1793,7 @@ static void hsw_crtc_disable(struct intel_atomic_state *state, 
	intel_encoders_disable(state, crtc);

	intel_encoders_post_disable(state, crtc);



	intel_disable_dpll(old_crtc_state);

	intel_dpll_disable(old_crtc_state);



	intel_encoders_post_pll_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

+4 −4
Original line number Diff line number Diff line
@@ -250,12 +250,12 @@ static void _intel_disable_shared_dpll(struct intel_display *display, 
}



/**

 * intel_enable_dpll - enable a CRTC's DPLL

 * intel_dpll_enable - enable a CRTC's DPLL

 * @crtc_state: CRTC, and its state, which has a DPLL

 *

 * Enable DPLL used by @crtc.

 */

void intel_enable_dpll(const struct intel_crtc_state *crtc_state)

void intel_dpll_enable(const struct intel_crtc_state *crtc_state)

{

	struct intel_display *display = to_intel_display(crtc_state);

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -296,12 +296,12 @@ void intel_enable_dpll(const struct intel_crtc_state *crtc_state) 
}



/**

 * intel_disable_dpll - disable a CRTC's shared DPLL

 * intel_dpll_disable - disable a CRTC's shared DPLL

 * @crtc_state: CRTC, and its state, which has a shared DPLL

 *

 * Disable DPLL used by @crtc.

 */

void intel_disable_dpll(const struct intel_crtc_state *crtc_state)

void intel_dpll_disable(const struct intel_crtc_state *crtc_state)

{

	struct intel_display *display = to_intel_display(crtc_state);

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

+2 −2
Original line number Diff line number Diff line
@@ -418,8 +418,8 @@ int intel_dpll_get_freq(struct intel_display *display, 
bool intel_dpll_get_hw_state(struct intel_display *display,

			     struct intel_dpll *pll,

			     struct intel_dpll_hw_state *dpll_hw_state);

void intel_enable_dpll(const struct intel_crtc_state *crtc_state);

void intel_disable_dpll(const struct intel_crtc_state *crtc_state);

void intel_dpll_enable(const struct intel_crtc_state *crtc_state);

void intel_dpll_disable(const struct intel_crtc_state *crtc_state);

void intel_dpll_swap_state(struct intel_atomic_state *state);

void intel_dpll_init(struct intel_display *display);

void intel_dpll_update_ref_clks(struct intel_display *display);

drivers/gpu/drm/i915/display/intel_pch_display.c

+3 −3
Original line number Diff line number Diff line
@@ -394,11 +394,11 @@ void ilk_pch_enable(struct intel_atomic_state *state, 
	 * transcoder, and we actually should do this to not upset any PCH

	 * transcoder that already use the clock when we share it.

	 *

	 * Note that enable_dpll tries to do the right thing, but

	 * Note that dpll_enable tries to do the right thing, but

	 * get_dpll unconditionally resets the pll - we need that

	 * to have the right LVDS enable sequence.

	 */

	intel_enable_dpll(crtc_state);

	intel_dpll_enable(crtc_state);



	/* set transcoder timing, panel must allow it */

	assert_pps_unlocked(display, pipe);
@@ -472,7 +472,7 @@ void ilk_pch_post_disable(struct intel_atomic_state *state, 


	ilk_fdi_pll_disable(crtc);



	intel_disable_dpll(old_crtc_state);

	intel_dpll_disable(old_crtc_state);

}



static void ilk_pch_clock_get(struct intel_crtc_state *crtc_state)