Commit 3a9f6bd5 authored by Simona Vetter's avatar Simona Vetter
Browse files

Merge tag 'amd-drm-fixes-6.18-2025-10-29' of... 

Merge tag 'amd-drm-fixes-6.18-2025-10-29' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.18-2025-10-29:

amdgpu:
- VPE idle handler fix
- Re-enable DM idle optimizations
- DCN3.0 fix
- SMU fix
- Powerplay fixes for fiji/iceland
- License fixes
- HDP eDP panel fix
- Vblank fix

radeon:
- devm migration fixes

Signed-off-by: default avatarSimona Vetter <simona.vetter@ffwll.ch>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patch.msgid.link/20251029201342.8813-1-alexander.deucher@amd.com
parents ef545484 b3656b35

drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c

+1 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

// SPDX-License-Identifier: MIT

/*

 * Copyright 2025 Advanced Micro Devices, Inc.

 *

drivers/gpu/drm/amd/amdgpu/amdgpu_cper.h

+1 −1
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/* SPDX-License-Identifier: MIT */

/*

 * Copyright 2025 Advanced Micro Devices, Inc.

 *

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

+30 −4
Original line number Diff line number Diff line
@@ -322,6 +322,26 @@ static int vpe_early_init(struct amdgpu_ip_block *ip_block) 
	return 0;

}



static bool vpe_need_dpm0_at_power_down(struct amdgpu_device *adev)

{

	switch (amdgpu_ip_version(adev, VPE_HWIP, 0)) {

	case IP_VERSION(6, 1, 1):

		return adev->pm.fw_version < 0x0a640500;

	default:

		return false;

	}

}



static int vpe_get_dpm_level(struct amdgpu_device *adev)

{

	struct amdgpu_vpe *vpe = &adev->vpe;



	if (!adev->pm.dpm_enabled)

		return 0;



	return RREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_request_lv));

}



static void vpe_idle_work_handler(struct work_struct *work)

{

	struct amdgpu_device *adev =
@@ -329,10 +349,16 @@ static void vpe_idle_work_handler(struct work_struct *work) 
	unsigned int fences = 0;



	fences += amdgpu_fence_count_emitted(&adev->vpe.ring);

	if (fences)

		goto reschedule;



	if (vpe_need_dpm0_at_power_down(adev) && vpe_get_dpm_level(adev) != 0)

		goto reschedule;



	if (fences == 0)

	amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VPE, AMD_PG_STATE_GATE);

	else

	return;



reschedule:

	schedule_delayed_work(&adev->vpe.idle_work, VPE_IDLE_TIMEOUT);

}

drivers/gpu/drm/amd/amdgpu/cyan_skillfish_reg_init.c

+1 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

// SPDX-License-Identifier: MIT

/*

 * Copyright 2018 Advanced Micro Devices, Inc.

 *

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

+18 −3
Original line number Diff line number Diff line
@@ -248,6 +248,8 @@ static void amdgpu_dm_crtc_vblank_control_worker(struct work_struct *work) 
	struct vblank_control_work *vblank_work =

		container_of(work, struct vblank_control_work, work);

	struct amdgpu_display_manager *dm = vblank_work->dm;

	struct amdgpu_device *adev = drm_to_adev(dm->ddev);

	int r;



	mutex_lock(&dm->dc_lock);
@@ -277,7 +279,16 @@ static void amdgpu_dm_crtc_vblank_control_worker(struct work_struct *work) 


	if (dm->active_vblank_irq_count == 0) {

		dc_post_update_surfaces_to_stream(dm->dc);



		r = amdgpu_dpm_pause_power_profile(adev, true);

		if (r)

			dev_warn(adev->dev, "failed to set default power profile mode\n");



		dc_allow_idle_optimizations(dm->dc, true);



		r = amdgpu_dpm_pause_power_profile(adev, false);

		if (r)

			dev_warn(adev->dev, "failed to restore the power profile mode\n");

	}



	mutex_unlock(&dm->dc_lock);
@@ -297,8 +308,12 @@ static inline int amdgpu_dm_crtc_set_vblank(struct drm_crtc *crtc, bool enable) 
	int irq_type;

	int rc = 0;



	if (acrtc->otg_inst == -1)

		goto skip;

	if (enable && !acrtc->base.enabled) {

		drm_dbg_vbl(crtc->dev,

				"Reject vblank enable on unconfigured CRTC %d (enabled=%d)\n",

				acrtc->crtc_id, acrtc->base.enabled);

		return -EINVAL;

	}



	irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, acrtc->crtc_id);
@@ -383,7 +398,7 @@ static inline int amdgpu_dm_crtc_set_vblank(struct drm_crtc *crtc, bool enable) 
			return rc;

	}

#endif

skip:



	if (amdgpu_in_reset(adev))

		return 0;