Unverified Commit 3aa1a7d0 authored by Palmer Dabbelt's avatar Palmer Dabbelt
Browse files

Merge patch series "RISC-V: Select ACPI PPTT drivers" 

This series adds support for ACPI PPTT via cacheinfo.

* b4-shazam-merge:
  RISC-V: Select ACPI PPTT drivers
  riscv: cacheinfo: initialize cacheinfo's level and type from ACPI PPTT
  riscv: cacheinfo: remove the useless input parameter (node) of ci_leaf_init()

Link: https://lore.kernel.org/r/20240617131425.7526-1-cuiyunhui@bytedance.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parents ec1dc56b 66381d36

arch/riscv/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ config 32BIT 
config RISCV

	def_bool y

	select ACPI_GENERIC_GSI if ACPI

	select ACPI_PPTT if ACPI

	select ACPI_REDUCED_HARDWARE_ONLY if ACPI

	select ACPI_SPCR_TABLE if ACPI

	select ARCH_DMA_DEFAULT_COHERENT

arch/riscv/kernel/cacheinfo.c

+28 −7
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
 * Copyright (C) 2017 SiFive

 */



#include <linux/acpi.h>

#include <linux/cpu.h>

#include <linux/of.h>

#include <asm/cacheinfo.h>
@@ -64,7 +65,6 @@ uintptr_t get_cache_geometry(u32 level, enum cache_type type) 
}



static void ci_leaf_init(struct cacheinfo *this_leaf,

			 struct device_node *node,

			 enum cache_type type, unsigned int level)

{

	this_leaf->level = level;
@@ -79,12 +79,33 @@ int populate_cache_leaves(unsigned int cpu) 
	struct device_node *prev = NULL;

	int levels = 1, level = 1;



	if (!acpi_disabled) {

		int ret, fw_levels, split_levels;



		ret = acpi_get_cache_info(cpu, &fw_levels, &split_levels);

		if (ret)

			return ret;



		BUG_ON((split_levels > fw_levels) ||

		       (split_levels + fw_levels > this_cpu_ci->num_leaves));



		for (; level <= this_cpu_ci->num_levels; level++) {

			if (level <= split_levels) {

				ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level);

				ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level);

			} else {

				ci_leaf_init(this_leaf++, CACHE_TYPE_UNIFIED, level);

			}

		}

		return 0;

	}



	if (of_property_read_bool(np, "cache-size"))

		ci_leaf_init(this_leaf++, np, CACHE_TYPE_UNIFIED, level);

		ci_leaf_init(this_leaf++, CACHE_TYPE_UNIFIED, level);

	if (of_property_read_bool(np, "i-cache-size"))

		ci_leaf_init(this_leaf++, np, CACHE_TYPE_INST, level);

		ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level);

	if (of_property_read_bool(np, "d-cache-size"))

		ci_leaf_init(this_leaf++, np, CACHE_TYPE_DATA, level);

		ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level);



	prev = np;

	while ((np = of_find_next_cache_node(np))) {
@@ -97,11 +118,11 @@ int populate_cache_leaves(unsigned int cpu) 
		if (level <= levels)

			break;

		if (of_property_read_bool(np, "cache-size"))

			ci_leaf_init(this_leaf++, np, CACHE_TYPE_UNIFIED, level);

			ci_leaf_init(this_leaf++, CACHE_TYPE_UNIFIED, level);

		if (of_property_read_bool(np, "i-cache-size"))

			ci_leaf_init(this_leaf++, np, CACHE_TYPE_INST, level);

			ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level);

		if (of_property_read_bool(np, "d-cache-size"))

			ci_leaf_init(this_leaf++, np, CACHE_TYPE_DATA, level);

			ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level);

		levels = level;

	}

	of_node_put(np);