Commit 3ab21ad3 authored by Konrad Adamczyk's avatar Konrad Adamczyk Committed by Joerg Roedel
Browse files

iommu/mediatek: Add PGTABLE_PA_35_EN to mt8186 platform data 



The MT8186 chip supports 35-bit physical addresses in page table [1].
Set this platform flag.

[1] MT8186G_Application Processor Functional Specification_v1.0

Signed-off-by: default avatarKonrad Adamczyk <konrada@google.com>
Reviewed-by: default avatarYong Wu <yong.wu@mediatek.com>
Link: https://lore.kernel.org/r/20241017112036.368772-1-konrada@google.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 8e929cb5

drivers/iommu/mtk_iommu.c

+1 −1
Original line number Diff line number Diff line
@@ -1599,7 +1599,7 @@ static const unsigned int mt8186_larb_region_msk[MT8192_MULTI_REGION_NR_MAX][MTK 
static const struct mtk_iommu_plat_data mt8186_data_mm = {

	.m4u_plat       = M4U_MT8186,

	.flags          = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |

			  WR_THROT_EN | IOVA_34_EN | MTK_IOMMU_TYPE_MM,

			  WR_THROT_EN | IOVA_34_EN | MTK_IOMMU_TYPE_MM | PGTABLE_PA_35_EN,

	.larbid_remap   = {{0}, {1, MTK_INVALID_LARBID, 8}, {4}, {7}, {2}, {9, 11, 19, 20},

			   {MTK_INVALID_LARBID, 14, 16},

			   {MTK_INVALID_LARBID, 13, MTK_INVALID_LARBID, 17}},