Commit 3ce97f25 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Vinod Koul
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dt-bindings: phy: samsung,exynos5250-sata-phy: convert to dtschema



Convert the Samsung Exynos5250 SoC SATA PHY bindings to DT schema
format.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220129193646.372481-6-krzysztof.kozlowski@canonical.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 4bbb2b22
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/samsung,exynos5250-sata-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung Exynos5250 SoC SATA PHY

maintainers:
  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
  - Marek Szyprowski <m.szyprowski@samsung.com>
  - Sylwester Nawrocki <s.nawrocki@samsung.com>

properties:
  compatible:
    const: samsung,exynos5250-sata-phy

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: sata_phyctrl

  "#phy-cells":
    const: 0

  reg:
    maxItems: 1

  samsung,syscon-phandle:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to PMU system controller interface.

  samsung,exynos-sataphy-i2c-phandle:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to I2C SATA interface.

required:
  - compatible
  - clocks
  - clock-names
  - "#phy-cells"
  - reg
  - samsung,syscon-phandle
  - samsung,exynos-sataphy-i2c-phandle

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/exynos5250.h>

    phy@12170000 {
        compatible = "samsung,exynos5250-sata-phy";
        reg = <0x12170000 0x1ff>;
        clocks = <&clock CLK_SATA_PHYCTRL>;
        clock-names = "sata_phyctrl";
        #phy-cells = <0>;
        samsung,syscon-phandle = <&pmu_system_controller>;
        samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
    };
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Samsung SATA PHY Controller
---------------------------

SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
Each SATA PHY controller should have its own node.

Required properties:
- compatible        : compatible list, contains "samsung,exynos5250-sata-phy"
- reg : offset and length of the SATA PHY register set;
- #phy-cells : must be zero
- clocks : must be exactly one entry
- clock-names : must be "sata_phyctrl"
- samsung,exynos-sataphy-i2c-phandle : a phandle to the I2C device, no arguments
- samsung,syscon-phandle : a phandle to the PMU system controller, no arguments

Example:
	sata_phy: sata-phy@12170000 {
		compatible = "samsung,exynos5250-sata-phy";
		reg = <0x12170000 0x1ff>;
		clocks = <&clock 287>;
		clock-names = "sata_phyctrl";
		#phy-cells = <0>;
		samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
		samsung,syscon-phandle = <&pmu_syscon>;
	};

Device-Tree bindings for sataphy i2c client driver
--------------------------------------------------