Loading arch/arm64/boot/dts/qcom/qcs8300.dtsi +7 −0 Original line number Diff line number Diff line Loading @@ -1148,6 +1148,13 @@ intc: interrupt-controller@17a00000 { redistributor-stride = <0x0 0x20000>; }; watchdog@17c10000 { compatible = "qcom,apss-wdt-qcs8300", "qcom,kpss-wdt"; reg = <0x0 0x17c10000 0x0 0x1000>; clocks = <&sleep_clk>; interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>; }; timer@17c20000 { compatible = "arm,armv7-timer-mem"; reg = <0x0 0x17c20000 0x0 0x1000>; Loading Loading
arch/arm64/boot/dts/qcom/qcs8300.dtsi +7 −0 Original line number Diff line number Diff line Loading @@ -1148,6 +1148,13 @@ intc: interrupt-controller@17a00000 { redistributor-stride = <0x0 0x20000>; }; watchdog@17c10000 { compatible = "qcom,apss-wdt-qcs8300", "qcom,kpss-wdt"; reg = <0x0 0x17c10000 0x0 0x1000>; clocks = <&sleep_clk>; interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>; }; timer@17c20000 { compatible = "arm,armv7-timer-mem"; reg = <0x0 0x17c20000 0x0 0x1000>; Loading