Commit 3d101165 authored by Peter Griffin's avatar Peter Griffin Committed by Martin K. Petersen
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scsi: ufs: exynos: Ensure pre_link() executes before exynos_ufs_phy_init() 



Ensure clocks are enabled before configuring unipro. Additionally move
the pre_link() hook before the exynos_ufs_phy_init() calls. This means
the register write sequence more closely resembles the ordering of the
downstream driver.

Signed-off-by: default avatarPeter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20250319-exynos-ufs-stability-fixes-v2-1-96722cc2ba1b@linaro.org


Reviewed-by: default avatarBart Van Assche <bvanassche@acm.org>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 2014c95a

drivers/ufs/host/ufs-exynos.c

+5 −5
Original line number Diff line number Diff line
@@ -1049,9 +1049,14 @@ static int exynos_ufs_pre_link(struct ufs_hba *hba) 
	exynos_ufs_config_intr(ufs, DFES_DEF_L4_ERRS, UNIPRO_L4);

	exynos_ufs_set_unipro_pclk_div(ufs);



	exynos_ufs_setup_clocks(hba, true, PRE_CHANGE);



	/* unipro */

	exynos_ufs_config_unipro(ufs);



	if (ufs->drv_data->pre_link)

		ufs->drv_data->pre_link(ufs);



	/* m-phy */

	exynos_ufs_phy_init(ufs);

	if (!(ufs->opts & EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR)) {
@@ -1059,11 +1064,6 @@ static int exynos_ufs_pre_link(struct ufs_hba *hba) 
		exynos_ufs_config_phy_cap_attr(ufs);

	}



	exynos_ufs_setup_clocks(hba, true, PRE_CHANGE);



	if (ufs->drv_data->pre_link)

		ufs->drv_data->pre_link(ufs);



	return 0;

}