Unverified Commit 3df761bd authored by Simon Trimmer's avatar Simon Trimmer Committed by Mark Brown
Browse files

ASoC: cs35l56: Wake transactions need to be issued twice 



As the dummy wake is a toggling signal (either I2C or SPI activity) it
is not guaranteed to meet the minimum asserted hold time for a wake
signal. In this case the wake must guarantee rising edges separated by
at least the minimum hold time.

Signed-off-by: default avatarSimon Trimmer <simont@opensource.cirrus.com>
Signed-off-by: default avatarRichard Fitzgerald <rf@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20231006111039.101914-3-rf@opensource.cirrus.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent a47cf4da

include/sound/cs35l56.h

+1 −0
Original line number Diff line number Diff line
@@ -243,6 +243,7 @@ 
#define CS35L56_HALO_STATE_POLL_US			1000

#define CS35L56_HALO_STATE_TIMEOUT_US			50000

#define CS35L56_RESET_PULSE_MIN_US			1100

#define CS35L56_WAKE_HOLD_TIME_US			1000



#define CS35L56_SDW1_PLAYBACK_PORT			1

#define CS35L56_SDW1_CAPTURE_PORT			3

sound/soc/codecs/cs35l56-shared.c

+35 −16
Original line number Diff line number Diff line
@@ -446,6 +446,32 @@ static const struct reg_sequence cs35l56_hibernate_wake_seq[] = { 
	REG_SEQ0(CS35L56_DSP_VIRTUAL1_MBOX_1, CS35L56_MBOX_CMD_WAKEUP),

};



static void cs35l56_issue_wake_event(struct cs35l56_base *cs35l56_base)

{

	/*

	 * Dummy transactions to trigger I2C/SPI auto-wake. Issue two

	 * transactions to meet the minimum required time from the rising edge

	 * to the last falling edge of wake.

	 *

	 * It uses bypassed write because we must wake the chip before

	 * disabling regmap cache-only.

	 *

	 * This can NAK on I2C which will terminate the write sequence so the

	 * single-write sequence is issued twice.

	 */

	regmap_multi_reg_write_bypassed(cs35l56_base->regmap,

					cs35l56_hibernate_wake_seq,

					ARRAY_SIZE(cs35l56_hibernate_wake_seq));



	usleep_range(CS35L56_WAKE_HOLD_TIME_US, 2 * CS35L56_WAKE_HOLD_TIME_US);



	regmap_multi_reg_write_bypassed(cs35l56_base->regmap,

					cs35l56_hibernate_wake_seq,

					ARRAY_SIZE(cs35l56_hibernate_wake_seq));



	cs35l56_wait_control_port_ready();

}



int cs35l56_runtime_suspend_common(struct cs35l56_base *cs35l56_base)

{

	unsigned int val;
@@ -500,17 +526,9 @@ int cs35l56_runtime_resume_common(struct cs35l56_base *cs35l56_base, bool is_sou 
	if (!cs35l56_base->can_hibernate)

		goto out_sync;



	if (!is_soundwire) {

		/*

		 * Dummy transaction to trigger I2C/SPI auto-wake. This will NAK on I2C.

		 * Must be done before releasing cache-only.

		 */

		regmap_multi_reg_write_bypassed(cs35l56_base->regmap,

						cs35l56_hibernate_wake_seq,

						ARRAY_SIZE(cs35l56_hibernate_wake_seq));



		cs35l56_wait_control_port_ready();

	}

	/* Must be done before releasing cache-only */

	if (!is_soundwire)

		cs35l56_issue_wake_event(cs35l56_base);



out_sync:

	regcache_cache_only(cs35l56_base->regmap, false);
@@ -578,12 +596,13 @@ int cs35l56_hw_init(struct cs35l56_base *cs35l56_base) 
	unsigned int devid, revid, otpid, secured;



	/*

	 * If the system is not using a reset_gpio then issue a

	 * dummy read to force a wakeup.

	 * When the system is not using a reset_gpio ensure the device is

	 * awake, otherwise the device has just been released from reset and

	 * the driver must wait for the control port to become usable.

	 */

	if (!cs35l56_base->reset_gpio)

		regmap_read(cs35l56_base->regmap, CS35L56_DSP_VIRTUAL1_MBOX_1, &devid);



		cs35l56_issue_wake_event(cs35l56_base);

	else

		cs35l56_wait_control_port_ready();



	/*