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An irresistible microoptimization (changing accesses to Src2 to just an AND :)) that also frees a bit for AVX in the low flags word. This makes it closer to SSE since both of them can access XMM registers, pointlessly shaving another clock cycle or two (maybe). No functional change intended. Signed-off-by:Paolo Bonzini <pbonzini@redhat.com> Reviewed-by:
Chang S. Bae <chang.seok.bae@intel.com> Link: https://patch.msgid.link/20251114003633.60689-3-pbonzini@redhat.com Signed-off-by:
Sean Christopherson <seanjc@google.com>