Commit 3f6702e1 authored by Hugues Fruchet's avatar Hugues Fruchet Committed by Hans Verkuil
Browse files

media: verisilicon: postproc: 4K support 



Support input larger than 4096x2048 using extended input width/height
fields of swreg92.
This is needed to decode large WebP or JPEG pictures.

Signed-off-by: default avatarHugues Fruchet <hugues.fruchet@foss.st.com>
Reviewed-by: default avatarNicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: default avatarNicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: default avatarHans Verkuil <hverkuil@xs4all.nl>
parent f7546da1

drivers/media/platform/verisilicon/hantro.h

+2 −0
Original line number Diff line number Diff line
@@ -323,6 +323,8 @@ struct hantro_postproc_regs { 
	struct hantro_reg output_fmt;

	struct hantro_reg orig_width;

	struct hantro_reg display_width;

	struct hantro_reg input_width_ext;

	struct hantro_reg input_height_ext;

};



struct hantro_vp9_decoded_buffer_info {

drivers/media/platform/verisilicon/hantro_g1_regs.h

+1 −1
Original line number Diff line number Diff line
@@ -350,7 +350,7 @@ 
#define     G1_REG_PP_CONTROL_OUT_WIDTH(v) (((v) << 4) & GENMASK(14, 4))

#define G1_REG_PP_MASK1_ORIG_WIDTH	G1_SWREG(88)

#define     G1_REG_PP_ORIG_WIDTH(v)	(((v) << 23) & GENMASK(31, 23))

#define G1_REG_PP_DISPLAY_WIDTH		G1_SWREG(92)

#define G1_REG_PP_DISPLAY_WIDTH_IN_EXT	G1_SWREG(92)

#define G1_REG_PP_FUSE			G1_SWREG(99)



#endif /* HANTRO_G1_REGS_H_ */

drivers/media/platform/verisilicon/hantro_postproc.c

+5 −1
Original line number Diff line number Diff line
@@ -49,7 +49,9 @@ static const struct hantro_postproc_regs hantro_g1_postproc_regs = { 
	.input_fmt = {G1_REG_PP_CONTROL, 29, 0x7},

	.output_fmt = {G1_REG_PP_CONTROL, 26, 0x7},

	.orig_width = {G1_REG_PP_MASK1_ORIG_WIDTH, 23, 0x1ff},

	.display_width = {G1_REG_PP_DISPLAY_WIDTH, 0, 0xfff},

	.display_width = {G1_REG_PP_DISPLAY_WIDTH_IN_EXT, 0, 0xfff},

	.input_width_ext = {G1_REG_PP_DISPLAY_WIDTH_IN_EXT, 26, 0x7},

	.input_height_ext = {G1_REG_PP_DISPLAY_WIDTH_IN_EXT, 29, 0x7},

};



bool hantro_needs_postproc(const struct hantro_ctx *ctx,
@@ -103,6 +105,8 @@ static void hantro_postproc_g1_enable(struct hantro_ctx *ctx) 
	HANTRO_PP_REG_WRITE(vpu, output_height, ctx->dst_fmt.height);

	HANTRO_PP_REG_WRITE(vpu, orig_width, MB_WIDTH(ctx->dst_fmt.width));

	HANTRO_PP_REG_WRITE(vpu, display_width, ctx->dst_fmt.width);

	HANTRO_PP_REG_WRITE(vpu, input_width_ext, MB_WIDTH(ctx->dst_fmt.width) >> 9);

	HANTRO_PP_REG_WRITE(vpu, input_height_ext, MB_HEIGHT(ctx->dst_fmt.height >> 8));

}



static int down_scale_factor(struct hantro_ctx *ctx)