Commit 3f7c869e authored by Niravkumar L Rabara's avatar Niravkumar L Rabara Committed by Dinh Nguyen
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arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id 



Add gpio0 controller node and correct DMA handshake ID for SPI
tx and rx channels.

Signed-off-by: default avatarNiravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent 8b87f3e3

arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi

+23 −1
Original line number Diff line number Diff line
@@ -222,6 +222,26 @@ i3c1: i3c@10da1000 { 
			status = "disabled";

		};



		gpio0: gpio@ffc03200 {

			compatible = "snps,dw-apb-gpio";

			reg = <0xffc03200 0x100>;

			#address-cells = <1>;

			#size-cells = <0>;

			resets = <&rst GPIO0_RESET>;

			status = "disabled";



			porta: gpio-controller@0 {

				compatible = "snps,dw-apb-gpio-port";

				reg = <0>;

				gpio-controller;

				#gpio-cells = <2>;

				snps,nr-gpios = <24>;

				interrupt-controller;

				#interrupt-cells = <2>;

				interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;

			};

		};



		gpio1: gpio@10c03300 {

			compatible = "snps,dw-apb-gpio";

			reg = <0x10c03300 0x100>;
@@ -314,7 +334,7 @@ spi0: spi@10da4000 { 
			reg-io-width = <4>;

			num-cs = <4>;

			clocks = <&clkmgr AGILEX5_L4_MAIN_CLK>;

			dmas = <&dmac0 2>, <&dmac0 3>;

			dmas = <&dmac0 16>, <&dmac0 17>;

			dma-names = "tx", "rx";

			status = "disabled";
@@ -331,6 +351,8 @@ spi1: spi@10da5000 { 
			reg-io-width = <4>;

			num-cs = <4>;

			clocks = <&clkmgr AGILEX5_L4_MAIN_CLK>;

			dmas = <&dmac0 20>, <&dmac0 21>;

			dma-names = "tx", "rx";

			status = "disabled";

		};