Commit 3f82f1c3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86-urgent-2023-12-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 fixes from Ingo Molnar:

 - Fix a secondary CPUs enumeration regression caused by creative MADT
   APIC table entries on certain systems.

 - Fix a race in the NOP-patcher that can spuriously trigger crashes on
   bootup.

 - Fix a bootup failure regression caused by the parallel bringup code,
   caused by firmware inconsistency between the APIC initialization
   states of the boot and secondary CPUs, on certain systems.

* tag 'x86-urgent-2023-12-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/acpi: Handle bogus MADT APIC tables gracefully
  x86/alternatives: Disable interrupts and sync when optimizing NOPs in place
  x86/alternatives: Sync core before enabling interrupts
  x86/smpboot/64: Handle X2APIC BIOS inconsistency gracefully
parents f969c914 d5a10b97

arch/x86/kernel/acpi/boot.c

+1 −1
Original line number Diff line number Diff line
@@ -293,6 +293,7 @@ acpi_parse_lapic(union acpi_subtable_headers * header, const unsigned long end) 
			    processor->processor_id, /* ACPI ID */

			    processor->lapic_flags & ACPI_MADT_ENABLED);



	has_lapic_cpus = true;

	return 0;

}
@@ -1134,7 +1135,6 @@ static int __init acpi_parse_madt_lapic_entries(void) 
	if (!count) {

		count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC,

					acpi_parse_lapic, MAX_LOCAL_APIC);

		has_lapic_cpus = count > 0;

		x2count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_X2APIC,

					acpi_parse_x2apic, MAX_LOCAL_APIC);

	}

arch/x86/kernel/alternative.c

+12 −2
Original line number Diff line number Diff line
@@ -255,6 +255,16 @@ static void __init_or_module noinline optimize_nops(u8 *instr, size_t len) 
	}

}



static void __init_or_module noinline optimize_nops_inplace(u8 *instr, size_t len)

{

	unsigned long flags;



	local_irq_save(flags);

	optimize_nops(instr, len);

	sync_core();

	local_irq_restore(flags);

}



/*

 * In this context, "source" is where the instructions are placed in the

 * section .altinstr_replacement, for example during kernel build by the
@@ -438,7 +448,7 @@ void __init_or_module noinline apply_alternatives(struct alt_instr *start, 
		 *   patch if feature is *NOT* present.

		 */

		if (!boot_cpu_has(a->cpuid) == !(a->flags & ALT_FLAG_NOT)) {

			optimize_nops(instr, a->instrlen);

			optimize_nops_inplace(instr, a->instrlen);

			continue;

		}
@@ -1685,8 +1695,8 @@ void __init_or_module text_poke_early(void *addr, const void *opcode, 
	} else {

		local_irq_save(flags);

		memcpy(addr, opcode, len);

		local_irq_restore(flags);

		sync_core();

		local_irq_restore(flags);



		/*

		 * Could also do a CLFLUSH here to speed up CPU recovery; but

arch/x86/kernel/head_64.S

+16 −0
Original line number Diff line number Diff line
@@ -255,6 +255,22 @@ SYM_INNER_LABEL(secondary_startup_64_no_verify, SYM_L_GLOBAL) 
	testl	$X2APIC_ENABLE, %eax

	jnz	.Lread_apicid_msr



#ifdef CONFIG_X86_X2APIC

	/*

	 * If system is in X2APIC mode then MMIO base might not be

	 * mapped causing the MMIO read below to fault. Faults can't

	 * be handled at that point.

	 */

	cmpl	$0, x2apic_mode(%rip)

	jz	.Lread_apicid_mmio



	/* Force the AP into X2APIC mode. */

	orl	$X2APIC_ENABLE, %eax

	wrmsr

	jmp	.Lread_apicid_msr

#endif



.Lread_apicid_mmio:

	/* Read the APIC ID from the fix-mapped MMIO space. */

	movq	apic_mmio_base(%rip), %rcx

	addq	$APIC_ID, %rcx