Commit 3fda3bf0 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/cdclk: abstract intel_cdclk_bw_min_cdclk() 



Add intel_cdclk_bw_min_cdclk() helper to avoid looking at struct
intel_cdclk_state internals outside of intel_cdclk.c.

Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/d07499174ebe55fa8fb98d4cb5ff541b6f5ec95b.1750847509.git.jani.nikula@intel.com


Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent d93ea1d8

drivers/gpu/drm/i915/display/intel_bw.c

+2 −2
Original line number Diff line number Diff line
@@ -1468,12 +1468,12 @@ int intel_bw_calc_min_cdclk(struct intel_atomic_state *state, 
	 * requirements. This can reduce back and forth

	 * display blinking due to constant cdclk changes.

	 */

	if (new_min_cdclk <= cdclk_state->bw_min_cdclk)

	if (new_min_cdclk <= intel_cdclk_bw_min_cdclk(cdclk_state))

		return 0;



	drm_dbg_kms(display->drm,

		    "new bandwidth min cdclk (%d kHz) > old min cdclk (%d kHz)\n",

		    new_min_cdclk, cdclk_state->bw_min_cdclk);

		    new_min_cdclk, intel_cdclk_bw_min_cdclk(cdclk_state));

	*need_cdclk_calc = true;



	return 0;

drivers/gpu/drm/i915/display/intel_cdclk.c

+5 −0
Original line number Diff line number Diff line
@@ -3844,3 +3844,8 @@ int intel_cdclk_min_cdclk(const struct intel_cdclk_state *cdclk_state, enum pipe 
{

	return cdclk_state->min_cdclk[pipe];

}



int intel_cdclk_bw_min_cdclk(const struct intel_cdclk_state *cdclk_state)

{

	return cdclk_state->bw_min_cdclk;

}

drivers/gpu/drm/i915/display/intel_cdclk.h

+1 −0
Original line number Diff line number Diff line
@@ -99,5 +99,6 @@ void intel_cdclk_debugfs_register(struct intel_display *display); 


int intel_cdclk_logical(const struct intel_cdclk_state *cdclk_state);

int intel_cdclk_min_cdclk(const struct intel_cdclk_state *cdclk_state, enum pipe pipe);

int intel_cdclk_bw_min_cdclk(const struct intel_cdclk_state *cdclk_state);



#endif /* __INTEL_CDCLK_H__ */