dpll: add frequency monitoring to netlink spec (3fdea79c) · Commits · git / linux-nf

Documentation/driver-api/dpll.rst

+20 −0

Original line number	Diff line number	Diff line
		@@ -250,6 +250,24 @@ in the ``DPLL_A_PIN_PHASE_OFFSET`` attribute.
		``DPLL_A_PHASE_OFFSET_MONITOR`` attr state of a feature
		=============================== ========================

		Frequency monitor
		=================

		Some DPLL devices may offer the capability to measure the actual
		frequency of all available input pins. The attribute and current feature state
		shall be included in the response message of the ``DPLL_CMD_DEVICE_GET``
		command for supported DPLL devices. In such cases, users can also control
		the feature using the ``DPLL_CMD_DEVICE_SET`` command by setting the
		``enum dpll_feature_state`` values for the attribute.
		Once enabled the measured input frequency for each input pin shall be
		returned in the ``DPLL_A_PIN_MEASURED_FREQUENCY`` attribute. The value
		is in millihertz (mHz), using ``DPLL_PIN_MEASURED_FREQUENCY_DIVIDER``
		as the divider.

		=============================== ========================
		``DPLL_A_FREQUENCY_MONITOR`` attr state of a feature
		=============================== ========================

		Embedded SYNC
		=============

		@@ -411,6 +429,8 @@ according to attribute purpose.
		``DPLL_A_PIN_STATE`` attr state of pin on the parent
		pin
		``DPLL_A_PIN_CAPABILITIES`` attr bitmask of pin capabilities
		``DPLL_A_PIN_MEASURED_FREQUENCY`` attr measured frequency of
		an input pin in mHz
		==================================== ==================================

		==================================== =================================

Documentation/netlink/specs/dpll.yaml

+35 −0

Original line number	Diff line number	Diff line
		@@ -240,6 +240,20 @@ definitions:
		integer part of a measured phase offset value.
		Value of (DPLL_A_PHASE_OFFSET % DPLL_PHASE_OFFSET_DIVIDER) is a
		fractional part of a measured phase offset value.
		-
		type: const
		name: pin-measured-frequency-divider
		value: 1000
		doc: \|
		pin measured frequency divider allows userspace to calculate
		a value of measured input frequency as a fractional value with
		three digit decimal precision (millihertz).
		Value of (DPLL_A_PIN_MEASURED_FREQUENCY /
		DPLL_PIN_MEASURED_FREQUENCY_DIVIDER) is an integer part of
		a measured frequency value.
		Value of (DPLL_A_PIN_MEASURED_FREQUENCY %
		DPLL_PIN_MEASURED_FREQUENCY_DIVIDER) is a fractional part of
		a measured frequency value.
		-
		type: enum
		name: feature-state
		@@ -319,6 +333,13 @@ attribute-sets:
		name: phase-offset-avg-factor
		type: u32
		doc: Averaging factor applied to calculation of reported phase offset.
		-
		name: frequency-monitor
		type: u32
		enum: feature-state
		doc: Current or desired state of the frequency monitor feature.
		If enabled, dpll device shall measure all currently available
		inputs for their actual input frequency.
		-
		name: pin
		enum-name: dpll_a_pin
		@@ -456,6 +477,17 @@ attribute-sets:
		Value is in PPT (parts per trillion, 10^-12).
		Note: This attribute provides higher resolution than the standard
		fractional-frequency-offset (which is in PPM).
		-
		name: measured-frequency
		type: u64
		doc: \|
		The measured frequency of the input pin in millihertz (mHz).
		Value of (DPLL_A_PIN_MEASURED_FREQUENCY /
		DPLL_PIN_MEASURED_FREQUENCY_DIVIDER) is an integer part (Hz)
		of a measured frequency value.
		Value of (DPLL_A_PIN_MEASURED_FREQUENCY %
		DPLL_PIN_MEASURED_FREQUENCY_DIVIDER) is a fractional part
		of a measured frequency value.

		-
		name: pin-parent-device
		@@ -544,6 +576,7 @@ operations:
		- type
		- phase-offset-monitor
		- phase-offset-avg-factor
		- frequency-monitor

		dump:
		reply: *dev-attrs
		@@ -563,6 +596,7 @@ operations:
		- mode
		- phase-offset-monitor
		- phase-offset-avg-factor
		- frequency-monitor
		-
		name: device-create-ntf
		doc: Notification about device appearing
		@@ -643,6 +677,7 @@ operations:
		- esync-frequency-supported
		- esync-pulse
		- reference-sync
		- measured-frequency

		dump:
		request:

drivers/dpll/dpll_nl.c

+3 −2

Original line number	Diff line number	Diff line
		@@ -43,11 +43,12 @@ static const struct nla_policy dpll_device_get_nl_policy[DPLL_A_ID + 1] = {
		};

		/* DPLL_CMD_DEVICE_SET - do */
		static const struct nla_policy dpll_device_set_nl_policy[DPLL_A_PHASE_OFFSET_AVG_FACTOR + 1] = {
		static const struct nla_policy dpll_device_set_nl_policy[DPLL_A_FREQUENCY_MONITOR + 1] = {
		[DPLL_A_ID] = { .type = NLA_U32, },
		[DPLL_A_MODE] = NLA_POLICY_RANGE(NLA_U32, 1, 2),
		[DPLL_A_PHASE_OFFSET_MONITOR] = NLA_POLICY_MAX(NLA_U32, 1),
		[DPLL_A_PHASE_OFFSET_AVG_FACTOR] = { .type = NLA_U32, },
		[DPLL_A_FREQUENCY_MONITOR] = NLA_POLICY_MAX(NLA_U32, 1),
		};

		/* DPLL_CMD_PIN_ID_GET - do */
		@@ -115,7 +116,7 @@ static const struct genl_split_ops dpll_nl_ops[] = {
		.doit = dpll_nl_device_set_doit,
		.post_doit = dpll_post_doit,
		.policy = dpll_device_set_nl_policy,
		.maxattr = DPLL_A_PHASE_OFFSET_AVG_FACTOR,
		.maxattr = DPLL_A_FREQUENCY_MONITOR,
		.flags = GENL_ADMIN_PERM \| GENL_CMD_CAP_DO,
		},
		{

include/uapi/linux/dpll.h

+4 −1

Original line number	Diff line number	Diff line
		@@ -192,6 +192,7 @@ enum dpll_pin_capabilities {
		};

		#define DPLL_PHASE_OFFSET_DIVIDER 1000
		#define DPLL_PIN_MEASURED_FREQUENCY_DIVIDER 1000

		/**
		* enum dpll_feature_state - Allow control (enable/disable) and status checking
		@@ -218,6 +219,7 @@ enum dpll_a {
		DPLL_A_CLOCK_QUALITY_LEVEL,
		DPLL_A_PHASE_OFFSET_MONITOR,
		DPLL_A_PHASE_OFFSET_AVG_FACTOR,
		DPLL_A_FREQUENCY_MONITOR,

		__DPLL_A_MAX,
		DPLL_A_MAX = (__DPLL_A_MAX - 1)
		@@ -254,6 +256,7 @@ enum dpll_a_pin {
		DPLL_A_PIN_REFERENCE_SYNC,
		DPLL_A_PIN_PHASE_ADJUST_GRAN,
		DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET_PPT,
		DPLL_A_PIN_MEASURED_FREQUENCY,

		__DPLL_A_PIN_MAX,
		DPLL_A_PIN_MAX = (__DPLL_A_PIN_MAX - 1)