Commit 3fe12c79 authored by Praveenkumar I's avatar Praveenkumar I Committed by Bjorn Andersson
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arm64: dts: qcom: ipq5332: Add tsens node 



IPQ5332 has tsens v2.3.3 peripheral. This patch adds the tsens
node with nvmem cells for calibration data.

Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: default avatarPraveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: default avatarManikanta Mylavarapu <quic_mmanikan@quicinc.com>
Link: https://lore.kernel.org/r/20250210120436.821684-4-quic_mmanikan@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent a566fb9b

arch/arm64/boot/dts/qcom/ipq5332.dtsi

+66 −0
Original line number Diff line number Diff line
@@ -177,6 +177,46 @@ cpu_speed_bin: cpu-speed-bin@1d { 
				reg = <0x1d 0x2>;

				bits = <7 2>;

			};



			tsens_sens11_off: s11@3a5 {

				reg = <0x3a5 0x1>;

				bits = <4 4>;

			};



			tsens_sens12_off: s12@3a6 {

				reg = <0x3a6 0x1>;

				bits = <0 4>;

			};



			tsens_sens13_off: s13@3a6 {

				reg = <0x3a6 0x1>;

				bits = <4 4>;

			};



			tsens_sens14_off: s14@3ad {

				reg = <0x3ad 0x2>;

				bits = <7 4>;

			};



			tsens_sens15_off: s15@3ae {

				reg = <0x3ae 0x1>;

				bits = <3 4>;

			};



			tsens_mode: mode@3e1 {

				reg = <0x3e1 0x1>;

				bits = <0 3>;

			};



			tsens_base0: base0@3e1 {

				reg = <0x3e1 0x2>;

				bits = <3 10>;

			};



			tsens_base1: base1@3e2 {

				reg = <0x3e2 0x2>;

				bits = <5 10>;

			};

		};



		rng: rng@e3000 {
@@ -186,6 +226,32 @@ rng: rng@e3000 { 
			clock-names = "core";

		};



		tsens: thermal-sensor@4a9000 {

			compatible = "qcom,ipq5332-tsens";

			reg = <0x004a9000 0x1000>,

			      <0x004a8000 0x1000>;

			interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "combined";

			nvmem-cells = <&tsens_mode>,

				      <&tsens_base0>,

				      <&tsens_base1>,

				      <&tsens_sens11_off>,

				      <&tsens_sens12_off>,

				      <&tsens_sens13_off>,

				      <&tsens_sens14_off>,

				      <&tsens_sens15_off>;

			nvmem-cell-names = "mode",

					   "base0",

					   "base1",

					   "tsens_sens11_off",

					   "tsens_sens12_off",

					   "tsens_sens13_off",

					   "tsens_sens14_off",

					   "tsens_sens15_off";

			#qcom,sensors = <5>;

			#thermal-sensor-cells = <1>;

		};



		tlmm: pinctrl@1000000 {

			compatible = "qcom,ipq5332-tlmm";

			reg = <0x01000000 0x300000>;