Commit 40318a24 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/gfx12: set UNORD_DISPATCH in compute MQDs 

This needs to be set to 1 to avoid a potential deadlock in
the GC 10.x and newer.  On GC 9.x and older, this needs
to be set to 0. This can lead to hangs in some mixed
graphics and compute workloads.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3575


Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b05d6476

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

+1 −1
Original line number Diff line number Diff line
@@ -3054,7 +3054,7 @@ static int gfx_v12_0_compute_mqd_init(struct amdgpu_device *adev, void *m, 
			    (order_base_2(prop->queue_size / 4) - 1));

	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, RPTR_BLOCK_SIZE,

			    (order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));

	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 0);

	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 1);

	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TUNNEL_DISPATCH, 0);

	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);

	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12.c

+1 −0
Original line number Diff line number Diff line
@@ -187,6 +187,7 @@ static void update_mqd(struct mqd_manager *mm, void *mqd, 
	m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT;

	m->cp_hqd_pq_control |=

			ffs(q->queue_size / sizeof(unsigned int)) - 1 - 1;

	m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__UNORD_DISPATCH_MASK;

	pr_debug("cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control);



	m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8);