Commit 40658534 authored by Niklas Cassel's avatar Niklas Cassel Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: Add rock5b overlays for PCIe endpoint mode 



Add rock5b overlays for PCIe endpoint mode support.

If using the rock5b as an endpoint against a normal PC, only the
rk3588-rock-5b-pcie-ep.dtbo needs to be applied.

If using two rock5b:s, with one board as EP and the other board as RC,
rk3588-rock-5b-pcie-ep.dtbo and rk3588-rock-5b-pcie-srns.dtbo has to
be applied to the respective boards.

Signed-off-by: default avatarNiklas Cassel <cassel@kernel.org>
Link: https://lore.kernel.org/r/20240607-rockchip-pcie-ep-v1-v5-13-0a042d6b0049@kernel.org


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 7ef44e17

arch/arm64/boot/dts/rockchip/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -129,6 +129,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb 
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-quartzpro64.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtbo

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtbo

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-toybrick-x0.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-turing-rk1.dtb

arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso

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+25 −0
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * DT-overlay to run the PCIe3_4L Dual Mode controller in Endpoint mode

 * in the SRNS (Separate Reference Clock No Spread) configuration.

 *

 * NOTE: If using a setup with two ROCK 5B:s, with one board running in

 * RC mode and the other board running in EP mode, see also the device

 * tree overlay: rk3588-rock-5b-pcie-srns.dtso.

 */



/dts-v1/;

/plugin/;



&pcie30phy {

	rockchip,rx-common-refclk-mode = <0 0 0 0>;

};



&pcie3x4 {

	status = "disabled";

};



&pcie3x4_ep {

	vpcie3v3-supply = <&vcc3v3_pcie30>;

	status = "okay";

};

arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-srns.dtso

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * DT-overlay to run the PCIe3_4L Dual Mode controller in Root Complex

 * mode in the SRNS (Separate Reference Clock No Spread) configuration.

 *

 * This device tree overlay is only needed (on the RC side) when running

 * a setup with two ROCK 5B:s, with one board running in RC mode and the

 * other board running in EP mode.

 */



/dts-v1/;

/plugin/;



&pcie30phy {

	rockchip,rx-common-refclk-mode = <0 0 0 0>;

};