Commit 4083d8d6 authored by Troy Mitchell's avatar Troy Mitchell Committed by Yixun Lan
Browse files

riscv: dts: spacemit: pinctrl: update register and IO power 



Change the size of the reg register to 0x1000 to match the hardware.
This register range covers the IO power domain's register addresses.

The IO power domain registers are protected. In order to access the
protected IO power domain registers, a valid unlock sequence must be
performed by writing the required keys to the AIB Secure Access Register
(ASAR).

The ASAR register resides within the APBC register address space.
A corresponding syscon property `spacemit,apbc` is added to allow
the pinctrl driver to access this register.

Signed-off-by: default avatarTroy Mitchell <troy.mitchell@linux.spacemit.com>
Acked-by: default avatarLinus Walleij <linusw@kernel.org>
Link: https://lore.kernel.org/r/20260108-kx-pinctrl-aib-io-pwr-domain-v2-3-6bcb46146e53@linux.spacemit.com


Signed-off-by: default avatarYixun Lan <dlan@kernel.org>
parent 7a613180

arch/riscv/boot/dts/spacemit/k1.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -628,10 +628,11 @@ i2c8: i2c@d401d800 { 


		pinctrl: pinctrl@d401e000 {

			compatible = "spacemit,k1-pinctrl";

			reg = <0x0 0xd401e000 0x0 0x400>;

			reg = <0x0 0xd401e000 0x0 0x1000>;

			clocks = <&syscon_apbc CLK_AIB>,

				 <&syscon_apbc CLK_AIB_BUS>;

			clock-names = "func", "bus";

			spacemit,apbc = <&syscon_apbc>;

		};



		pwm8: pwm@d4020000 {