Commit 42870599 authored by Krishna chaitanya chundru's avatar Krishna chaitanya chundru Committed by Bjorn Andersson
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arm64: dts: qcom: sm8450: Add interconnect path to PCIe node 



Add PCIe-MEM & CPU-PCIe interconnect path to the PCIe nodes.

Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarKrishna chaitanya chundru <quic_krichai@quicinc.com>
Link: https://lore.kernel.org/r/20240518-opp_support-v13-1-78c73edf50de@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 49cc31f8

arch/arm64/boot/dts/qcom/sm8450.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -1803,6 +1803,12 @@ pcie0: pcie@1c00000 { 
					<0 0 0 3 &intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */

					<0 0 0 4 &intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */



			interconnects = <&pcie_noc MASTER_PCIE_0 QCOM_ICC_TAG_ALWAYS

					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,

					<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS

					 &config_noc SLAVE_PCIE_0 QCOM_ICC_TAG_ALWAYS>;

			interconnect-names = "pcie-mem", "cpu-pcie";



			clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,

				 <&gcc GCC_PCIE_0_PIPE_CLK_SRC>,

				 <&pcie0_phy>,
@@ -1932,6 +1938,12 @@ pcie1: pcie@1c08000 { 
					<0 0 0 3 &intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */

					<0 0 0 4 &intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */



			interconnects = <&pcie_noc MASTER_PCIE_1 QCOM_ICC_TAG_ALWAYS

					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,

					<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS

					 &config_noc SLAVE_PCIE_1 QCOM_ICC_TAG_ALWAYS>;

			interconnect-names = "pcie-mem", "cpu-pcie";



			clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,

				 <&gcc GCC_PCIE_1_PIPE_CLK_SRC>,

				 <&pcie1_phy>,