Commit 43ad65ec authored by Danilo Krummrich's avatar Danilo Krummrich
Browse files

gpu: nova-core: consider `clippy::cast_lossless` 

Fix all warnings caused by `clippy::cast_lossless`, which is going to be
enabled by [1].

Cc: Alexandre Courbot <acourbot@nvidia.com>
Cc: Miguel Ojeda <ojeda@kernel.org>
Link: https://lore.kernel.org/r/20250615-ptr-as-ptr-v12-5-f43b024581e8@gmail.com

 [1]
Reviewed-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
Tested-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
Link: https://lore.kernel.org/r/20250624132337.2242-2-dakr@kernel.org


Signed-off-by: default avatarDanilo Krummrich <dakr@kernel.org>
parent 1b8233bb

drivers/gpu/nova-core/falcon.rs

+1 −1
Original line number Diff line number Diff line
@@ -428,7 +428,7 @@ fn dma_wr<F: FalconFirmware<Target = E>>( 
                fw.dma_handle_with_offset(load_offsets.src_start as usize)?,

            ),

        };

        if dma_start % DMA_LEN as bindings::dma_addr_t > 0 {

        if dma_start % bindings::dma_addr_t::from(DMA_LEN) > 0 {

            dev_err!(

                self.dev,

                "DMA transfer start addresses must be a multiple of {}",

drivers/gpu/nova-core/falcon/hal/ga102.rs

+1 −1
Original line number Diff line number Diff line
@@ -78,7 +78,7 @@ fn program_brom_ga102<E: FalconEngine>(bar: &Bar0, params: &FalconBromParams) -> 
        .set_value(params.pkc_data_offset)

        .write(bar, E::BASE);

    regs::NV_PFALCON2_FALCON_BROM_ENGIDMASK::default()

        .set_value(params.engine_id_mask as u32)

        .set_value(u32::from(params.engine_id_mask))

        .write(bar, E::BASE);

    regs::NV_PFALCON2_FALCON_BROM_CURR_UCODE_ID::default()

        .set_ucode_id(params.ucode_id)

drivers/gpu/nova-core/fb/hal/ga100.rs

+2 −2
Original line number Diff line number Diff line
@@ -11,8 +11,8 @@ 
use super::tu102::FLUSH_SYSMEM_ADDR_SHIFT;



pub(super) fn read_sysmem_flush_page_ga100(bar: &Bar0) -> u64 {

    (regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08() as u64) << FLUSH_SYSMEM_ADDR_SHIFT

        | (regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI::read(bar).adr_63_40() as u64)

    u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08()) << FLUSH_SYSMEM_ADDR_SHIFT

        | u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI::read(bar).adr_63_40())

            << FLUSH_SYSMEM_ADDR_SHIFT_HI

}

drivers/gpu/nova-core/fb/hal/tu102.rs

+1 −1
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ 
pub(super) const FLUSH_SYSMEM_ADDR_SHIFT: u32 = 8;



pub(super) fn read_sysmem_flush_page_gm107(bar: &Bar0) -> u64 {

    (regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08() as u64) << FLUSH_SYSMEM_ADDR_SHIFT

    u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08()) << FLUSH_SYSMEM_ADDR_SHIFT

}



pub(super) fn write_sysmem_flush_page_gm107(bar: &Bar0, addr: u64) -> Result {

drivers/gpu/nova-core/firmware/fwsec.rs

+1 −1
Original line number Diff line number Diff line
@@ -346,7 +346,7 @@ pub(crate) fn new( 
        let desc = bios.fwsec_image().header(dev)?;

        let ucode_signed = if desc.signature_count != 0 {

            let sig_base_img = (desc.imem_load_size + desc.pkc_data_offset) as usize;

            let desc_sig_versions = desc.signature_versions as u32;

            let desc_sig_versions = u32::from(desc.signature_versions);

            let reg_fuse_version =

                falcon.signature_reg_fuse_version(bar, desc.engine_id_mask, desc.ucode_id)?;

            dev_dbg!(