Commit 4453808d authored by Lang Yu's avatar Lang Yu Committed by Alex Deucher
Browse files

drm/amdgpu: fix invalid fence handling in amdgpu_vm_tlb_flush 



CPU based update doesn't produce a fence, handle such cases properly.

Fixes: d8a3f0a0 ("drm/amdgpu: implement TLB flush fence")
Signed-off-by: default avatarLang Yu <lang.yu@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4da5a95b

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

+4 −2
Original line number Diff line number Diff line
@@ -908,10 +908,12 @@ amdgpu_vm_tlb_flush(struct amdgpu_vm_update_params *params, 
{

	struct amdgpu_vm *vm = params->vm;



	if (!fence || !*fence)

	tlb_cb->vm = vm;

	if (!fence || !*fence) {

		amdgpu_vm_tlb_seq_cb(NULL, &tlb_cb->cb);

		return;

	}



	tlb_cb->vm = vm;

	if (!dma_fence_add_callback(*fence, &tlb_cb->cb,

				    amdgpu_vm_tlb_seq_cb)) {

		dma_fence_put(vm->last_tlb_flush);