Unverified Commit 44b91d61 authored by Fabrizio Castro's avatar Fabrizio Castro Committed by Mark Brown
Browse files

spi: dt-bindings: Document the RZ/V2H(P) RSPI



Add dt-bindings for the RSPI IP found inside the Renesas RZ/V2H(P)
SoC.

Signed-off-by: default avatarFabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>

Link: https://patch.msgid.link/20250704162036.468765-2-fabrizio.castro.jz@renesas.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 89be9a83
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/renesas,rzv2h-rspi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas RZ/V2H(P) Renesas Serial Peripheral Interface (RSPI)

maintainers:
  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>

allOf:
  - $ref: spi-controller.yaml#

properties:
  compatible:
    const: renesas,r9a09g057-rspi # RZ/V2H(P)

  reg:
    maxItems: 1

  interrupts:
    items:
      - description: Idle Interrupt
      - description: Error Interrupt
      - description: Communication End Interrupt
      - description: Receive Buffer Full Interrupt
      - description: Transmit Buffer Empty Interrupt

  interrupt-names:
    items:
      - const: idle
      - const: error
      - const: end
      - const: rx
      - const: tx

  clocks:
    maxItems: 3

  clock-names:
    items:
      - const: pclk
      - const: pclk_sfr
      - const: tclk

  resets:
    maxItems: 2

  reset-names:
    items:
      - const: presetn
      - const: tresetn

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - interrupt-names
  - clocks
  - clock-names
  - resets
  - reset-names
  - power-domains
  - '#address-cells'
  - '#size-cells'

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/renesas-cpg-mssr.h>
    spi@12800800 {
        compatible = "renesas,r9a09g057-rspi";

        reg = <0x12800800 0x400>;
        interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>,
                     <GIC_SPI 504 IRQ_TYPE_EDGE_RISING>,
                     <GIC_SPI 505 IRQ_TYPE_EDGE_RISING>;
        interrupt-names = "idle", "error", "end", "rx", "tx";
        clocks = <&cpg CPG_MOD 0x5a>,
                 <&cpg CPG_MOD 0x5b>,
                 <&cpg CPG_MOD 0x5c>;
        clock-names = "pclk", "pclk_sfr", "tclk";
        resets = <&cpg 0x7f>, <&cpg 0x80>;
        reset-names = "presetn", "tresetn";
        power-domains = <&cpg>;
        #address-cells = <1>;
        #size-cells = <0>;
    };