Commit 4616e547 authored by Vadim Pasternak's avatar Vadim Pasternak Committed by Hans de Goede
Browse files

platform/x86: mlx-platform: Add support for new system SGN2410 



Add support for new system type, which is a water-cooling flavor
of the VMOD001 system class, equipped with 48xSFP28 and 8xQSFP28
100G Ethernet ports.

System is recognized by "DMI_BOARD_NAME" and " DMI_PRODUCT_SKU"
matches, when these fields are set respectively to "VMOD001" and
"HI138".

Signed-off-by: default avatarVadim Pasternak <vadimp@nvidia.com>
Reviewed-by: default avatarOleksandr Shamray <oleksandrs@nvidia.com>
Link: https://lore.kernel.org/r/20211023094022.4193813-4-vadimp@nvidia.com


Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
parent 4289fd4a

drivers/platform/x86/mlx-platform.c

+113 −0
Original line number Diff line number Diff line
@@ -533,6 +533,21 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_pwr_items_data[] = { 
	},

};



static struct mlxreg_core_data mlxplat_mlxcpld_default_pwr_wc_items_data[] = {

	{

		.label = "pwr1",

		.reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,

		.mask = BIT(0),

		.hpdev.nr = MLXPLAT_CPLD_NR_NONE,

	},

	{

		.label = "pwr2",

		.reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,

		.mask = BIT(1),

		.hpdev.nr = MLXPLAT_CPLD_NR_NONE,

	},

};



static struct mlxreg_core_data mlxplat_mlxcpld_default_fan_items_data[] = {

	{

		.label = "fan1",
@@ -661,6 +676,46 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_data = { 
	.mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,

};



static struct mlxreg_core_item mlxplat_mlxcpld_default_wc_items[] = {

	{

		.data = mlxplat_mlxcpld_comex_psu_items_data,

		.aggr_mask = MLXPLAT_CPLD_AGGR_MASK_CARRIER,

		.reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET,

		.mask = MLXPLAT_CPLD_PSU_MASK,

		.count = ARRAY_SIZE(mlxplat_mlxcpld_default_psu_items_data),

		.inversed = 1,

		.health = false,

	},

	{

		.data = mlxplat_mlxcpld_default_pwr_wc_items_data,

		.aggr_mask = MLXPLAT_CPLD_AGGR_MASK_CARRIER,

		.reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,

		.mask = MLXPLAT_CPLD_PWR_MASK,

		.count = ARRAY_SIZE(mlxplat_mlxcpld_default_pwr_items_data),

		.inversed = 0,

		.health = false,

	},

	{

		.data = mlxplat_mlxcpld_default_asic_items_data,

		.aggr_mask = MLXPLAT_CPLD_AGGR_ASIC_MASK_DEF,

		.reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET,

		.mask = MLXPLAT_CPLD_ASIC_MASK,

		.count = ARRAY_SIZE(mlxplat_mlxcpld_default_asic_items_data),

		.inversed = 0,

		.health = true,

	},

};



static

struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_wc_data = {

	.items = mlxplat_mlxcpld_default_wc_items,

	.counter = ARRAY_SIZE(mlxplat_mlxcpld_default_wc_items),

	.cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET,

	.mask = MLXPLAT_CPLD_AGGR_MASK_DEF,

	.cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET,

	.mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,

};



static

struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_comex_data = {

	.items = mlxplat_mlxcpld_comex_items,
@@ -2018,6 +2073,35 @@ static struct mlxreg_core_platform_data mlxplat_default_led_data = { 
		.counter = ARRAY_SIZE(mlxplat_mlxcpld_default_led_data),

};



/* Platform led default data for water cooling */

static struct mlxreg_core_data mlxplat_mlxcpld_default_led_wc_data[] = {

	{

		.label = "status:green",

		.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,

		.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,

	},

	{

		.label = "status:red",

		.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,

		.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK

	},

	{

		.label = "psu:green",

		.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,

		.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,

	},

	{

		.label = "psu:red",

		.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,

		.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,

	},

};



static struct mlxreg_core_platform_data mlxplat_default_led_wc_data = {

		.data = mlxplat_mlxcpld_default_led_wc_data,

		.counter = ARRAY_SIZE(mlxplat_mlxcpld_default_led_wc_data),

};



/* Platform led MSN21xx system family data */

static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_led_data[] = {

	{
@@ -4311,6 +4395,28 @@ static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi) 
	return 1;

}



static int __init mlxplat_dmi_default_wc_matched(const struct dmi_system_id *dmi)

{

	int i;



	mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM;

	mlxplat_mux_num = ARRAY_SIZE(mlxplat_default_mux_data);

	mlxplat_mux_data = mlxplat_default_mux_data;

	for (i = 0; i < mlxplat_mux_num; i++) {

		mlxplat_mux_data[i].values = mlxplat_default_channels[i];

		mlxplat_mux_data[i].n_values =

				ARRAY_SIZE(mlxplat_default_channels[i]);

	}

	mlxplat_hotplug = &mlxplat_mlxcpld_default_wc_data;

	mlxplat_hotplug->deferred_nr =

		mlxplat_default_channels[i - 1][MLXPLAT_CPLD_GRP_CHNL_NUM - 1];

	mlxplat_led = &mlxplat_default_led_wc_data;

	mlxplat_regs_io = &mlxplat_default_regs_io_data;

	mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0];



	return 1;

}



static int __init mlxplat_dmi_msn21xx_matched(const struct dmi_system_id *dmi)

{

	int i;
@@ -4474,6 +4580,13 @@ static int __init mlxplat_dmi_modular_matched(const struct dmi_system_id *dmi) 
}



static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {

	{

		.callback = mlxplat_dmi_default_wc_matched,

		.matches = {

			DMI_MATCH(DMI_BOARD_NAME, "VMOD0001"),

			DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "HI138"),

		},

	},

	{

		.callback = mlxplat_dmi_default_matched,

		.matches = {