Commit 4892711a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86-urgent-2023-11-26' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 microcode fixes from Ingo Molnar:
 "Fix/enhance x86 microcode version reporting: fix the bootup log spam,
  and remove the driver version announcement to avoid version confusion
  when distros backport fixes"

* tag 'x86-urgent-2023-11-26' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/microcode: Rework early revisions reporting
  x86/microcode: Remove the driver announcement and version
parents e81fe505 080990aa

arch/x86/kernel/cpu/microcode/amd.c

+11 −28
Original line number Diff line number Diff line
@@ -104,8 +104,6 @@ struct cont_desc { 
	size_t		     size;

};



static u32 ucode_new_rev;



/*

 * Microcode patch container file is prepended to the initrd in cpio

 * format. See Documentation/arch/x86/microcode.rst
@@ -442,12 +440,11 @@ static int __apply_microcode_amd(struct microcode_amd *mc) 
 *

 * Returns true if container found (sets @desc), false otherwise.

 */

static bool early_apply_microcode(u32 cpuid_1_eax, void *ucode, size_t size)

static bool early_apply_microcode(u32 cpuid_1_eax, u32 old_rev, void *ucode, size_t size)

{

	struct cont_desc desc = { 0 };

	struct microcode_amd *mc;

	bool ret = false;

	u32 rev, dummy;



	desc.cpuid_1_eax = cpuid_1_eax;
@@ -457,22 +454,15 @@ static bool early_apply_microcode(u32 cpuid_1_eax, void *ucode, size_t size) 
	if (!mc)

		return ret;



	native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);



	/*

	 * Allow application of the same revision to pick up SMT-specific

	 * changes even if the revision of the other SMT thread is already

	 * up-to-date.

	 */

	if (rev > mc->hdr.patch_id)

	if (old_rev > mc->hdr.patch_id)

		return ret;



	if (!__apply_microcode_amd(mc)) {

		ucode_new_rev = mc->hdr.patch_id;

		ret = true;

	}



	return ret;

	return !__apply_microcode_amd(mc);

}



static bool get_builtin_microcode(struct cpio_data *cp, unsigned int family)
@@ -506,9 +496,12 @@ static void __init find_blobs_in_containers(unsigned int cpuid_1_eax, struct cpi 
	*ret = cp;

}



void __init load_ucode_amd_bsp(unsigned int cpuid_1_eax)

void __init load_ucode_amd_bsp(struct early_load_data *ed, unsigned int cpuid_1_eax)

{

	struct cpio_data cp = { };

	u32 dummy;



	native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->old_rev, dummy);



	/* Needed in load_microcode_amd() */

	ucode_cpu_info[0].cpu_sig.sig = cpuid_1_eax;
@@ -517,7 +510,8 @@ void __init load_ucode_amd_bsp(unsigned int cpuid_1_eax) 
	if (!(cp.data && cp.size))

		return;



	early_apply_microcode(cpuid_1_eax, cp.data, cp.size);

	if (early_apply_microcode(cpuid_1_eax, ed->old_rev, cp.data, cp.size))

		native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->new_rev, dummy);

}



static enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t size);
@@ -625,10 +619,8 @@ void reload_ucode_amd(unsigned int cpu) 
	rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);



	if (rev < mc->hdr.patch_id) {

		if (!__apply_microcode_amd(mc)) {

			ucode_new_rev = mc->hdr.patch_id;

			pr_info("reload patch_level=0x%08x\n", ucode_new_rev);

		}

		if (!__apply_microcode_amd(mc))

			pr_info_once("reload revision: 0x%08x\n", mc->hdr.patch_id);

	}

}
@@ -649,8 +641,6 @@ static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig) 
	if (p && (p->patch_id == csig->rev))

		uci->mc = p->data;



	pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);



	return 0;

}
@@ -691,8 +681,6 @@ static enum ucode_state apply_microcode_amd(int cpu) 
	rev = mc_amd->hdr.patch_id;

	ret = UCODE_UPDATED;



	pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);



out:

	uci->cpu_sig.rev = rev;

	c->microcode	 = rev;
@@ -935,11 +923,6 @@ struct microcode_ops * __init init_amd_microcode(void) 
		pr_warn("AMD CPU family 0x%x not supported\n", c->x86);

		return NULL;

	}



	if (ucode_new_rev)

		pr_info_once("microcode updated early to new patch_level=0x%08x\n",

			     ucode_new_rev);



	return &microcode_amd_ops;

}

arch/x86/kernel/cpu/microcode/core.c

+9 −6
Original line number Diff line number Diff line
@@ -41,8 +41,6 @@ 


#include "internal.h"



#define DRIVER_VERSION	"2.2"



static struct microcode_ops	*microcode_ops;

bool dis_ucode_ldr = true;
@@ -77,6 +75,8 @@ static u32 final_levels[] = { 
	0, /* T-101 terminator */

};



struct early_load_data early_data;



/*

 * Check the current patch level on this CPU.

 *
@@ -155,9 +155,9 @@ void __init load_ucode_bsp(void) 
		return;



	if (intel)

		load_ucode_intel_bsp();

		load_ucode_intel_bsp(&early_data);

	else

		load_ucode_amd_bsp(cpuid_1_eax);

		load_ucode_amd_bsp(&early_data, cpuid_1_eax);

}



void load_ucode_ap(void)
@@ -828,6 +828,11 @@ static int __init microcode_init(void) 
	if (!microcode_ops)

		return -ENODEV;



	pr_info_once("Current revision: 0x%08x\n", (early_data.new_rev ?: early_data.old_rev));



	if (early_data.new_rev)

		pr_info_once("Updated early from: 0x%08x\n", early_data.old_rev);



	microcode_pdev = platform_device_register_simple("microcode", -1, NULL, 0);

	if (IS_ERR(microcode_pdev))

		return PTR_ERR(microcode_pdev);
@@ -846,8 +851,6 @@ static int __init microcode_init(void) 
	cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/microcode:online",

			  mc_cpu_online, mc_cpu_down_prep);



	pr_info("Microcode Update Driver: v%s.", DRIVER_VERSION);



	return 0;



 out_pdev:

arch/x86/kernel/cpu/microcode/intel.c

+7 −10
Original line number Diff line number Diff line
@@ -339,16 +339,9 @@ static enum ucode_state __apply_microcode(struct ucode_cpu_info *uci, 
static enum ucode_state apply_microcode_early(struct ucode_cpu_info *uci)

{

	struct microcode_intel *mc = uci->mc;

	enum ucode_state ret;

	u32 cur_rev, date;

	u32 cur_rev;



	ret = __apply_microcode(uci, mc, &cur_rev);

	if (ret == UCODE_UPDATED) {

		date = mc->hdr.date;

		pr_info_once("updated early: 0x%x -> 0x%x, date = %04x-%02x-%02x\n",

			     cur_rev, mc->hdr.rev, date & 0xffff, date >> 24, (date >> 16) & 0xff);

	}

	return ret;

	return __apply_microcode(uci, mc, &cur_rev);

}



static __init bool load_builtin_intel_microcode(struct cpio_data *cp)
@@ -413,13 +406,17 @@ static int __init save_builtin_microcode(void) 
early_initcall(save_builtin_microcode);



/* Load microcode on BSP from initrd or builtin blobs */

void __init load_ucode_intel_bsp(void)

void __init load_ucode_intel_bsp(struct early_load_data *ed)

{

	struct ucode_cpu_info uci;



	ed->old_rev = intel_get_microcode_revision();



	uci.mc = get_microcode_blob(&uci, false);

	if (uci.mc && apply_microcode_early(&uci) == UCODE_UPDATED)

		ucode_patch_va = UCODE_BSP_LOADED;



	ed->new_rev = uci.cpu_sig.rev;

}



void load_ucode_intel_ap(void)

arch/x86/kernel/cpu/microcode/internal.h

+10 −4
Original line number Diff line number Diff line
@@ -37,6 +37,12 @@ struct microcode_ops { 
				use_nmi		: 1;

};



struct early_load_data {

	u32 old_rev;

	u32 new_rev;

};



extern struct early_load_data early_data;

extern struct ucode_cpu_info ucode_cpu_info[];

struct cpio_data find_microcode_in_initrd(const char *path);
@@ -92,14 +98,14 @@ extern bool dis_ucode_ldr; 
extern bool force_minrev;



#ifdef CONFIG_CPU_SUP_AMD

void load_ucode_amd_bsp(unsigned int family);

void load_ucode_amd_bsp(struct early_load_data *ed, unsigned int family);

void load_ucode_amd_ap(unsigned int family);

int save_microcode_in_initrd_amd(unsigned int family);

void reload_ucode_amd(unsigned int cpu);

struct microcode_ops *init_amd_microcode(void);

void exit_amd_microcode(void);

#else /* CONFIG_CPU_SUP_AMD */

static inline void load_ucode_amd_bsp(unsigned int family) { }

static inline void load_ucode_amd_bsp(struct early_load_data *ed, unsigned int family) { }

static inline void load_ucode_amd_ap(unsigned int family) { }

static inline int save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; }

static inline void reload_ucode_amd(unsigned int cpu) { }
@@ -108,12 +114,12 @@ static inline void exit_amd_microcode(void) { } 
#endif /* !CONFIG_CPU_SUP_AMD */



#ifdef CONFIG_CPU_SUP_INTEL

void load_ucode_intel_bsp(void);

void load_ucode_intel_bsp(struct early_load_data *ed);

void load_ucode_intel_ap(void);

void reload_ucode_intel(void);

struct microcode_ops *init_intel_microcode(void);

#else /* CONFIG_CPU_SUP_INTEL */

static inline void load_ucode_intel_bsp(void) { }

static inline void load_ucode_intel_bsp(struct early_load_data *ed) { }

static inline void load_ucode_intel_ap(void) { }

static inline void reload_ucode_intel(void) { }

static inline struct microcode_ops *init_intel_microcode(void) { return NULL; }