Commit 4996b4c1 authored by Timur Kristóf's avatar Timur Kristóf Committed by Alex Deucher
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drm/amdgpu/gmc6: Delegate VM faults to soft IRQ handler ring



On old GPUs, it may be an issue that handling the interrupts from
VM faults is too slow and the interrupt handler (IH) ring may
overflow, which can cause an eventual hang.

Delegate the processing of all VM faults to the soft
IRQ handler ring.

As a result, we spend much less time in the IRQ handler that
interacts with the HW IH ring, which significantly reduces the
chance of hangs/reboots.

Signed-off-by: default avatarTimur Kristóf <timur.kristof@gmail.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 61673efc
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+6 −0
Original line number Diff line number Diff line
@@ -1070,6 +1070,12 @@ static int gmc_v6_0_process_interrupt(struct amdgpu_device *adev,
{
	u32 addr, status;

	/* Delegate to the soft IRQ handler ring */
	if (adev->irq.ih_soft.enabled && entry->ih != &adev->irq.ih_soft) {
		amdgpu_irq_delegate(adev, entry, 4);
		return 1;
	}

	addr = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_ADDR);
	status = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_STATUS);
	WREG32_P(mmVM_CONTEXT1_CNTL2, 1, ~1);