Commit 49991cca authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Geert Uytterhoeven
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dt-bindings: clock: r9a08g045-cpg: Add power domain ID for RTC 



The RTC and VBATTB don't share the MSTOP control bit (but only the bus
clock and the reset signal). As the MSTOP control is modeled though power
domains add power domain ID for the RTC device available on the
Renesas RZ/G3S SoC.

Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241019084738.3370489-2-claudiu.beznea.uj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 9852d85e

include/dt-bindings/clock/r9a08g045-cpg.h

+1 −0
Original line number Diff line number Diff line
@@ -308,5 +308,6 @@ 
#define R9A08G045_PD_DDR		64

#define R9A08G045_PD_TZCDDR		65

#define R9A08G045_PD_OTFDE_DDR		66

#define R9A08G045_PD_RTC		67



#endif /* __DT_BINDINGS_CLOCK_R9A08G045_CPG_H__ */