Commit 49b04e40 authored by James Morse's avatar James Morse
Browse files

arm_mpam: resctrl: Update the rmid reallocation limit 



resctrl's limbo code needs to be told when the data left in a cache is
small enough for the partid+pmg value to be re-allocated.

x86 uses the cache size divided by the number of rmid users the cache may
have. Do the same, but for the smallest cache, and with the number of
partid-and-pmg users.

Tested-by: default avatarGavin Shan <gshan@redhat.com>
Tested-by: default avatarShaopeng Tan <tan.shaopeng@jp.fujitsu.com>
Tested-by: default avatarPeter Newman <peternewman@google.com>
Tested-by: default avatarZeng Heng <zengheng4@huawei.com>
Tested-by: default avatarPunit Agrawal <punit.agrawal@oss.qualcomm.com>
Tested-by: default avatarJesse Chick <jessechick@os.amperecomputing.com>
Reviewed-by: default avatarZeng Heng <zengheng4@huawei.com>
Reviewed-by: default avatarShaopeng Tan <tan.shaopeng@jp.fujitsu.com>
Reviewed-by: default avatarJonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: default avatarGavin Shan <gshan@redhat.com>
Co-developed-by: default avatarBen Horgan <ben.horgan@arm.com>
Signed-off-by: default avatarBen Horgan <ben.horgan@arm.com>
Signed-off-by: default avatarJames Morse <james.morse@arm.com>
parent fb56b299

drivers/resctrl/mpam_resctrl.c

+39 −0
Original line number Diff line number Diff line
@@ -438,6 +438,42 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain_hdr *hdr, 
				 closid, rmid, val);

}



/*

 * The rmid realloc threshold should be for the smallest cache exposed to

 * resctrl.

 */

static int update_rmid_limits(struct mpam_class *class)

{

	u32 num_unique_pmg = resctrl_arch_system_num_rmid_idx();

	struct mpam_props *cprops = &class->props;

	struct cacheinfo *ci;



	lockdep_assert_cpus_held();



	if (!mpam_has_feature(mpam_feat_msmon_csu, cprops))

		return 0;



	/*

	 * Assume cache levels are the same size for all CPUs...

	 * The check just requires any online CPU and it can't go offline as we

	 * hold the cpu lock.

	 */

	ci = get_cpu_cacheinfo_level(raw_smp_processor_id(), class->level);

	if (!ci || ci->size == 0) {

		pr_debug("Could not read cache size for class %u\n",

			 class->level);

		return -EINVAL;

	}



	if (!resctrl_rmid_realloc_limit ||

	    ci->size < resctrl_rmid_realloc_limit) {

		resctrl_rmid_realloc_limit = ci->size;

		resctrl_rmid_realloc_threshold = ci->size / num_unique_pmg;

	}



	return 0;

}



static bool cache_has_usable_cpor(struct mpam_class *class)

{

	struct mpam_props *cprops = &class->props;
@@ -850,6 +886,9 @@ static void mpam_resctrl_pick_counters(void) 
			/* CSU counters only make sense on a cache. */

			switch (class->type) {

			case MPAM_CLASS_CACHE:

				if (update_rmid_limits(class))

					break;



				counter_update_class(QOS_L3_OCCUP_EVENT_ID, class);

				break;

			default: