Commit 4aff152d authored by Ben Dooks's avatar Ben Dooks Committed by Thierry Reding
Browse files

pwm: dwc: add PWM bit unset in get_state call 



If we are not in PWM mode, then the output is technically a 50%
output based on a single timer instead of the high-low based on
the two counters. Add a check for the PWM mode in dwc_pwm_get_state()
and if DWC_TIM_CTRL_PWM is not set, then return a 50% cycle.

This may only be an issue on initialisation, as the rest of the
code currently assumes we're always going to have the extended
PWM mode using two counters.

Signed-off-by: default avatarBen Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20230907161242.67190-4-ben.dooks@codethink.co.uk


Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
parent 81432e2e

drivers/pwm/pwm-dwc-core.c

+19 −11
Original line number Diff line number Diff line
@@ -122,24 +122,32 @@ static int dwc_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, 
{

	struct dwc_pwm *dwc = to_dwc_pwm(chip);

	u64 duty, period;

	u32 ctrl, ld, ld2;



	pm_runtime_get_sync(chip->dev);



	state->enabled = !!(dwc_pwm_readl(dwc,

				DWC_TIM_CTRL(pwm->hwpwm)) & DWC_TIM_CTRL_EN);

	ctrl = dwc_pwm_readl(dwc, DWC_TIM_CTRL(pwm->hwpwm));

	ld = dwc_pwm_readl(dwc, DWC_TIM_LD_CNT(pwm->hwpwm));

	ld2 = dwc_pwm_readl(dwc, DWC_TIM_LD_CNT2(pwm->hwpwm));



	duty = dwc_pwm_readl(dwc, DWC_TIM_LD_CNT(pwm->hwpwm));

	duty += 1;

	duty *= dwc->clk_ns;

	state->duty_cycle = duty;

	state->enabled = !!(ctrl & DWC_TIM_CTRL_EN);



	period = dwc_pwm_readl(dwc, DWC_TIM_LD_CNT2(pwm->hwpwm));

	period += 1;

	period *= dwc->clk_ns;

	/*

	 * If we're not in PWM, technically the output is a 50-50

	 * based on the timer load-count only.

	 */

	if (ctrl & DWC_TIM_CTRL_PWM) {

		duty = (ld + 1) * dwc->clk_ns;

		period = (ld2 + 1)  * dwc->clk_ns;

		period += duty;

	state->period = period;

	} else {

		duty = (ld + 1) * dwc->clk_ns;

		period = duty * 2;

	}



	state->polarity = PWM_POLARITY_INVERSED;

	state->period = period;

	state->duty_cycle = duty;



	pm_runtime_put_sync(chip->dev);