Commit 4c551165 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'irq-core-2025-01-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull interrupt subsystem updates from Thomas Gleixner:

 - Consolidate the machine_kexec_mask_interrupts() by providing a
   generic implementation and replacing the copy & pasta orgy in the
   relevant architectures.

 - Prevent unconditional operations on interrupt chips during kexec
   shutdown, which can trigger warnings in certain cases when the
   underlying interrupt has been shut down before.

 - Make the enforcement of interrupt handling in interrupt context
   unconditionally available, so that it actually works for non x86
   related interrupt chips. The earlier enablement for ARM GIC chips set
   the required chip flag, but did not notice that the check was hidden
   behind a config switch which is not selected by ARM[64].

 - Decrapify the handling of deferred interrupt affinity setting.

   Some interrupt chips require that affinity changes are made from the
   context of handling an interrupt to avoid certain race conditions.
   For x86 this was the default, but with interrupt remapping this
   requirement was lifted and a flag was introduced which tells the core
   code that affinity changes can be done in any context. Unrestricted
   affinity changes are the default for the majority of interrupt chips.

   RISCV has the requirement to add the deferred mode to one of it's
   interrupt controllers, but with the original implementation this
   would require to add the any context flag to all other RISC-V
   interrupt chips. That's backwards, so reverse the logic and require
   that chips, which need the deferred mode have to be marked
   accordingly. That avoids chasing the 'sane' chips and marking them.

 - Add multi-node support to the Loongarch AVEC interrupt controller
   driver.

 - The usual tiny cleanups, fixes and improvements all over the place.

* tag 'irq-core-2025-01-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  genirq/generic_chip: Export irq_gc_mask_disable_and_ack_set()
  genirq/timings: Add kernel-doc for a function parameter
  genirq: Remove IRQ_MOVE_PCNTXT and related code
  x86/apic: Convert to IRQCHIP_MOVE_DEFERRED
  genirq: Provide IRQCHIP_MOVE_DEFERRED
  hexagon: Remove GENERIC_PENDING_IRQ leftover
  ARC: Remove GENERIC_PENDING_IRQ
  genirq: Remove handle_enforce_irqctx() wrapper
  genirq: Make handle_enforce_irqctx() unconditionally available
  irqchip/loongarch-avec: Add multi-nodes topology support
  irqchip/ts4800: Replace seq_printf() by seq_puts()
  irqchip/ti-sci-inta : Add module build support
  irqchip/ti-sci-intr: Add module build support
  irqchip/irq-brcmstb-l2: Replace brcmstb_l2_mask_and_ack() by generic function
  irqchip: keystone: Use syscon_regmap_lookup_by_phandle_args
  genirq/kexec: Prevent redundant IRQ masking by checking state before shutdown
  kexec: Consolidate machine_kexec_mask_interrupts() implementation
  genirq: Reuse irq_thread_fn() for forced thread case
  genirq: Move irq_thread_fn() further up in the code
parents f200c315 a4b3990e

arch/arc/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -25,7 +25,6 @@ config ARC 
	# for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP

	select GENERIC_IRQ_SHOW

	select GENERIC_PCI_IOMAP

	select GENERIC_PENDING_IRQ if SMP

	select GENERIC_SCHED_CLOCK

	select GENERIC_SMP_IDLE_THREAD

	select GENERIC_IOREMAP

arch/arc/kernel/mcip.c

+0 −2
Original line number Diff line number Diff line
@@ -357,8 +357,6 @@ static void idu_cascade_isr(struct irq_desc *desc) 
static int idu_irq_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq)

{

	irq_set_chip_and_handler(virq, &idu_irq_chip, handle_level_irq);

	irq_set_status_flags(virq, IRQ_MOVE_PCNTXT);



	return 0;

}

arch/arm/kernel/machine_kexec.c

+0 −23
Original line number Diff line number Diff line
@@ -127,29 +127,6 @@ void crash_smp_send_stop(void) 
	cpus_stopped = 1;

}



static void machine_kexec_mask_interrupts(void)

{

	unsigned int i;

	struct irq_desc *desc;



	for_each_irq_desc(i, desc) {

		struct irq_chip *chip;



		chip = irq_desc_get_chip(desc);

		if (!chip)

			continue;



		if (chip->irq_eoi && irqd_irq_inprogress(&desc->irq_data))

			chip->irq_eoi(&desc->irq_data);



		if (chip->irq_mask)

			chip->irq_mask(&desc->irq_data);



		if (chip->irq_disable && !irqd_irq_disabled(&desc->irq_data))

			chip->irq_disable(&desc->irq_data);

	}

}



void machine_crash_shutdown(struct pt_regs *regs)

{

	local_irq_disable();

arch/arm64/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -149,6 +149,7 @@ config ARM64 
	select GENERIC_IDLE_POLL_SETUP

	select GENERIC_IOREMAP

	select GENERIC_IRQ_IPI

	select GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD

	select GENERIC_IRQ_PROBE

	select GENERIC_IRQ_SHOW

	select GENERIC_IRQ_SHOW_LEVEL

arch/arm64/Kconfig.platforms

+0 −2
Original line number Diff line number Diff line
@@ -135,8 +135,6 @@ config ARCH_K3 
	select SOC_TI

	select TI_MESSAGE_MANAGER

	select TI_SCI_PROTOCOL

	select TI_SCI_INTR_IRQCHIP

	select TI_SCI_INTA_IRQCHIP

	select TI_K3_SOCINFO

	help

	  This enables support for Texas Instruments' K3 multicore SoC