Commit 4ca7fe99 authored by Yihang Li's avatar Yihang Li Committed by Martin K. Petersen
Browse files

scsi: hisi_sas: Use macro instead of magic number 



The hisi_sas driver has a large number of magic numbers which makes for
unfriendly code reading. Use macro definitions instead.

Signed-off-by: default avatarYihang Li <liyihang9@huawei.com>
Link: https://lore.kernel.org/r/20250414080845.1220997-2-liyihang9@huawei.com


Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 0af2f6be

drivers/scsi/hisi_sas/hisi_sas.h

+32 −11
Original line number Diff line number Diff line
@@ -46,6 +46,13 @@ 
#define HISI_SAS_IOST_ITCT_CACHE_DW_SZ 10

#define HISI_SAS_FIFO_DATA_DW_SIZE 32



#define HISI_SAS_REG_MEM_SIZE 4

#define HISI_SAS_MAX_CDB_LEN 16

#define HISI_SAS_BLK_QUEUE_DEPTH 64



#define BYTE_TO_DW 4

#define BYTE_TO_DDW 8



#define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer))

#define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table))
@@ -92,6 +99,8 @@ 


#define HISI_SAS_WAIT_PHYUP_TIMEOUT	(30 * HZ)

#define HISI_SAS_CLEAR_ITCT_TIMEOUT	(20 * HZ)

#define HISI_SAS_DELAY_FOR_PHY_DISABLE 100

#define NAME_BUF_SIZE 256



struct hisi_hba;
@@ -167,6 +176,8 @@ struct hisi_sas_debugfs_fifo { 
	u32 rd_data[HISI_SAS_FIFO_DATA_DW_SIZE];

};



#define FRAME_RCVD_BUF 32

#define SAS_PHY_RESV_SIZE 2

struct hisi_sas_phy {

	struct work_struct	works[HISI_PHYES_NUM];

	struct hisi_hba	*hisi_hba;
@@ -178,10 +189,10 @@ struct hisi_sas_phy { 
	spinlock_t lock;

	u64		port_id; /* from hw */

	u64		frame_rcvd_size;

	u8		frame_rcvd[32];

	u8		frame_rcvd[FRAME_RCVD_BUF];

	u8		phy_attached;

	u8		in_reset;

	u8		reserved[2];

	u8		reserved[SAS_PHY_RESV_SIZE];

	u32		phy_type;

	u32		code_violation_err_count;

	enum sas_linkrate	minimum_linkrate;
@@ -349,6 +360,7 @@ struct hisi_sas_hw { 
};



#define HISI_SAS_MAX_DEBUGFS_DUMP (50)

#define HISI_SAS_DEFAULT_DEBUGFS_DUMP 1



struct hisi_sas_debugfs_cq {

	struct hisi_sas_cq *cq;
@@ -528,12 +540,13 @@ struct hisi_sas_cmd_hdr { 
	__le64 dif_prd_table_addr;

};



#define ITCT_RESV_DDW 12

struct hisi_sas_itct {

	__le64 qw0;

	__le64 sas_addr;

	__le64 qw2;

	__le64 qw3;

	__le64 qw4_15[12];

	__le64 qw4_15[ITCT_RESV_DDW];

};



struct hisi_sas_iost {
@@ -543,22 +556,26 @@ struct hisi_sas_iost { 
	__le64 qw3;

};



#define ERROR_RECORD_BUF_DW 4

struct hisi_sas_err_record {

	u32	data[4];

	u32	data[ERROR_RECORD_BUF_DW];

};



#define FIS_RESV_DW 3

struct hisi_sas_initial_fis {

	struct hisi_sas_err_record err_record;

	struct dev_to_host_fis fis;

	u32 rsvd[3];

	u32 rsvd[FIS_RESV_DW];

};



#define BREAKPOINT_DATA_SIZE 128

struct hisi_sas_breakpoint {

	u8	data[128];

	u8	data[BREAKPOINT_DATA_SIZE];

};



#define BREAKPOINT_TAG_NUM 32

struct hisi_sas_sata_breakpoint {

	struct hisi_sas_breakpoint tag[32];

	struct hisi_sas_breakpoint tag[BREAKPOINT_TAG_NUM];

};



struct hisi_sas_sge {
@@ -569,13 +586,15 @@ struct hisi_sas_sge { 
	__le32 data_off;

};



#define SMP_CMD_TABLE_SIZE 44

struct hisi_sas_command_table_smp {

	u8 bytes[44];

	u8 bytes[SMP_CMD_TABLE_SIZE];

};



#define DUMMY_BUF_SIZE 12

struct hisi_sas_command_table_stp {

	struct	host_to_dev_fis command_fis;

	u8	dummy[12];

	u8	dummy[DUMMY_BUF_SIZE];

	u8	atapi_cdb[ATAPI_CDB_LEN];

};
@@ -589,12 +608,13 @@ struct hisi_sas_sge_dif_page { 
	struct hisi_sas_sge sge[HISI_SAS_SGE_DIF_PAGE_CNT];

}  __aligned(16);



#define PROT_BUF_SIZE 7

struct hisi_sas_command_table_ssp {

	struct ssp_frame_hdr hdr;

	union {

		struct {

			struct ssp_command_iu task;

			u32 prot[7];

			u32 prot[PROT_BUF_SIZE];

		};

		struct ssp_tmf_iu ssp_task;

		struct xfer_rdy_iu xfer_rdy;
@@ -608,9 +628,10 @@ union hisi_sas_command_table { 
	struct hisi_sas_command_table_stp stp;

}  __aligned(16);



#define IU_BUF_SIZE 1024

struct hisi_sas_status_buffer {

	struct hisi_sas_err_record err;

	u8	iu[1024];

	u8	iu[IU_BUF_SIZE];

}  __aligned(16);



struct hisi_sas_slot_buf_table {

drivers/scsi/hisi_sas/hisi_sas_main.c

+28 −13
Original line number Diff line number Diff line
@@ -7,6 +7,16 @@ 
#include "hisi_sas.h"

#define DRV_NAME "hisi_sas"



#define LINK_RATE_BIT_MASK 2

#define FIS_BUF_SIZE 20

#define WAIT_CMD_COMPLETE_DELAY 100

#define WAIT_CMD_COMPLETE_TMROUT 5000

#define DELAY_FOR_LINK_READY 2000

#define BLK_CNT_OPTIMIZE_MARK 64

#define HZ_TO_MHZ 1000000

#define DELAY_FOR_SOFTRESET_MAX 1000

#define DELAY_FOR_SOFTRESET_MIN 900



#define DEV_IS_GONE(dev) \

	((!dev) || (dev->dev_type == SAS_PHY_UNUSED))
@@ -151,7 +161,7 @@ u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max) 


	max -= SAS_LINK_RATE_1_5_GBPS;

	for (i = 0; i <= max; i++)

		rate |= 1 << (i * 2);

		rate |= 1 << (i * LINK_RATE_BIT_MASK);

	return rate;

}

EXPORT_SYMBOL_GPL(hisi_sas_get_prog_phy_linkrate_mask);
@@ -900,7 +910,7 @@ int hisi_sas_sdev_configure(struct scsi_device *sdev, struct queue_limits *lim) 
	if (ret)

		return ret;

	if (!dev_is_sata(dev))

		sas_change_queue_depth(sdev, 64);

		sas_change_queue_depth(sdev, HISI_SAS_BLK_QUEUE_DEPTH);



	return 0;

}
@@ -1242,7 +1252,7 @@ static int hisi_sas_phy_set_linkrate(struct hisi_hba *hisi_hba, int phy_no, 
	sas_phy->phy->minimum_linkrate = min;



	hisi_sas_phy_enable(hisi_hba, phy_no, 0);

	msleep(100);

	msleep(HISI_SAS_DELAY_FOR_PHY_DISABLE);

	hisi_hba->hw->phy_set_linkrate(hisi_hba, phy_no, &_r);

	hisi_sas_phy_enable(hisi_hba, phy_no, 1);
@@ -1272,7 +1282,7 @@ static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func, 


	case PHY_FUNC_LINK_RESET:

		hisi_sas_phy_enable(hisi_hba, phy_no, 0);

		msleep(100);

		msleep(HISI_SAS_DELAY_FOR_PHY_DISABLE);

		hisi_sas_phy_enable(hisi_hba, phy_no, 1);

		break;
@@ -1327,7 +1337,7 @@ static void hisi_sas_fill_ata_reset_cmd(struct ata_device *dev, 


static int hisi_sas_softreset_ata_disk(struct domain_device *device)

{

	u8 fis[20] = {0};

	u8 fis[FIS_BUF_SIZE] = {0};

	struct ata_port *ap = device->sata_dev.ap;

	struct ata_link *link;

	int rc = TMF_RESP_FUNC_FAILED;
@@ -1344,7 +1354,7 @@ static int hisi_sas_softreset_ata_disk(struct domain_device *device) 
	}



	if (rc == TMF_RESP_FUNC_COMPLETE) {

		usleep_range(900, 1000);

		usleep_range(DELAY_FOR_SOFTRESET_MIN, DELAY_FOR_SOFTRESET_MAX);

		ata_for_each_link(link, ap, EDGE) {

			int pmp = sata_srst_pmp(link);
@@ -1474,7 +1484,7 @@ static void hisi_sas_send_ata_reset_each_phy(struct hisi_hba *hisi_hba, 
	struct device *dev = hisi_hba->dev;

	int rc = TMF_RESP_FUNC_FAILED;

	struct ata_link *link;

	u8 fis[20] = {0};

	u8 fis[FIS_BUF_SIZE] = {0};

	int i;



	for (i = 0; i < hisi_hba->n_phy; i++) {
@@ -1541,7 +1551,9 @@ void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba) 
	hisi_hba->phy_state = hisi_hba->hw->get_phys_state(hisi_hba);



	scsi_block_requests(shost);

	hisi_hba->hw->wait_cmds_complete_timeout(hisi_hba, 100, 5000);

	hisi_hba->hw->wait_cmds_complete_timeout(hisi_hba,

						 WAIT_CMD_COMPLETE_DELAY,

						 WAIT_CMD_COMPLETE_TMROUT);



	/*

	 * hisi_hba->timer is only used for v1/v2 hw, and check hw->sht
@@ -1842,7 +1854,7 @@ static int hisi_sas_debug_I_T_nexus_reset(struct domain_device *device) 
		rc = ata_wait_after_reset(link, jiffies + HISI_SAS_WAIT_PHYUP_TIMEOUT,

					  smp_ata_check_ready_type);

	} else {

		msleep(2000);

		msleep(DELAY_FOR_LINK_READY);

	}



	return rc;
@@ -2276,12 +2288,14 @@ int hisi_sas_alloc(struct hisi_hba *hisi_hba) 
		goto err_out;



	/* roundup to avoid overly large block size */

	max_command_entries_ru = roundup(max_command_entries, 64);

	max_command_entries_ru = roundup(max_command_entries,

					 BLK_CNT_OPTIMIZE_MARK);

	if (hisi_hba->prot_mask & HISI_SAS_DIX_PROT_MASK)

		sz_slot_buf_ru = sizeof(struct hisi_sas_slot_dif_buf_table);

	else

		sz_slot_buf_ru = sizeof(struct hisi_sas_slot_buf_table);

	sz_slot_buf_ru = roundup(sz_slot_buf_ru, 64);



	sz_slot_buf_ru = roundup(sz_slot_buf_ru, BLK_CNT_OPTIMIZE_MARK);

	s = max(lcm(max_command_entries_ru, sz_slot_buf_ru), PAGE_SIZE);

	blk_cnt = (max_command_entries_ru * sz_slot_buf_ru) / s;

	slots_per_blk = s / sz_slot_buf_ru;
@@ -2446,7 +2460,8 @@ int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba) 
	if (IS_ERR(refclk))

		dev_dbg(dev, "no ref clk property\n");

	else

		hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) / 1000000;

		hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) /

						 HZ_TO_MHZ;



	if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) {

		dev_err(dev, "could not get property phy-count\n");
@@ -2568,7 +2583,7 @@ int hisi_sas_probe(struct platform_device *pdev, 
	shost->max_id = HISI_SAS_MAX_DEVICES;

	shost->max_lun = ~0;

	shost->max_channel = 1;

	shost->max_cmd_len = 16;

	shost->max_cmd_len = HISI_SAS_MAX_CDB_LEN;

	if (hisi_hba->hw->slot_index_alloc) {

		shost->can_queue = HISI_SAS_MAX_COMMANDS;

		shost->cmd_per_lun = HISI_SAS_MAX_COMMANDS;

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

+153 −91

File changed.

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