Commit 4f823f59 authored by Alexander Stein's avatar Alexander Stein Committed by Shawn Guo
Browse files

arm64: dts: freescale: imx93-tqma9352-mba93xxca: add missing pad configurations



- add missing (and currently unused) pad groups
- assign muxed GPIO pads for X1 to gpio2 node

Signed-off-by: default avatarMarkus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: default avatarAlexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent ed02d0b9
Loading
Loading
Loading
Loading
+42 −0
Original line number Diff line number Diff line
@@ -289,6 +289,11 @@ tcpc-irq-hog {
	};
};

&gpio2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpio2>;
};

&lpi2c3 {
	#address-cells = <1>;
	#size-cells = <0>;
@@ -654,6 +659,28 @@ MX93_PAD_GPIO_IO25__CAN2_TX 0x039e
		>;
	};

	pinctrl_gpio2: gpio2grp {
		fsl,pins = <
			/* HYS | PD | FSEL_2 | DSE X4 */
			MX93_PAD_GPIO_IO16__GPIO2_IO16			0x151e
			MX93_PAD_GPIO_IO17__GPIO2_IO17			0x151e
			MX93_PAD_GPIO_IO18__GPIO2_IO18			0x151e
			MX93_PAD_GPIO_IO19__GPIO2_IO19			0x151e
			MX93_PAD_GPIO_IO20__GPIO2_IO20			0x151e
			MX93_PAD_GPIO_IO21__GPIO2_IO21			0x151e
			MX93_PAD_GPIO_IO26__GPIO2_IO26			0x151e
		>;
	};

	pinctrl_jtag: jtaggrp {
		fsl,pins = <
			MX93_PAD_DAP_TCLK_SWCLK__JTAG_MUX_TCK		0x051e
			MX93_PAD_DAP_TDI__JTAG_MUX_TDI			0x1200
			MX93_PAD_DAP_TDO_TRACESWO__JTAG_MUX_TDO		0x031e
			MX93_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS		0x1200
		>;
	};

	pinctrl_lpi2c3: lpi2c3grp {
		fsl,pins = <
			/* SION | HYS | OD | FSEL_3 | DSE X4 */
@@ -688,6 +715,14 @@ MX93_PAD_SAI1_RXD0__GPIO1_IO14 0x1000
		>;
	};

	pinctrl_mipi_csi: mipicsigrp {
		fsl,pins = <
			MX93_PAD_CCM_CLKO3__CCMSRCGPCMIX_CLKO3		0x051e /* MCLK */
			MX93_PAD_GPIO_IO10__GPIO2_IO10			0x051e /* TRIGGER */
			MX93_PAD_GPIO_IO11__GPIO2_IO11			0x1400 /* SYNC */
		>;
	};

	pinctrl_pexp_irq: pexpirqgrp {
		fsl,pins = <
			/* HYS | FSEL_0 | No DSE */
@@ -709,6 +744,13 @@ MX93_PAD_SAI1_TXFS__GPIO1_IO11 0x1000
		>;
	};

	pinctrl_tc9595: tc9595-grp {
		fsl,pins = <
			/* HYS | PD | FSEL_0 | no DSE */
			MX93_PAD_CCM_CLKO4__GPIO4_IO29			0x1400
		>;
	};

	pinctrl_tpm5: tpm5grp {
		fsl,pins = <
			MX93_PAD_GPIO_IO06__TPM5_CH0			0x57e