Commit 4fbd66d8 authored by Xi Ruoyao's avatar Xi Ruoyao Committed by Thomas Bogendoerfer
Browse files

MIPS: Loongson64: DTS: Really fix PCIe port nodes for ls7a 



Fix the dtc warnings:

    arch/mips/boot/dts/loongson/ls7a-pch.dtsi:68.16-416.5: Warning (interrupt_provider): /bus@10000000/pci@1a000000: '#interrupt-cells' found, but node is not an interrupt provider
    arch/mips/boot/dts/loongson/ls7a-pch.dtsi:68.16-416.5: Warning (interrupt_provider): /bus@10000000/pci@1a000000: '#interrupt-cells' found, but node is not an interrupt provider
    arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dtb: Warning (interrupt_map): Failed prerequisite 'interrupt_provider'

And a runtime warning introduced in commit 045b14ca ("of: WARN on
deprecated #address-cells/#size-cells handling"):

    WARNING: CPU: 0 PID: 1 at drivers/of/base.c:106 of_bus_n_addr_cells+0x9c/0xe0
    Missing '#address-cells' in /bus@10000000/pci@1a000000/pci_bridge@9,0

The fix is similar to commit d89a415f ("MIPS: Loongson64: DTS: Fix PCIe
port nodes for ls7a"), which has fixed the issue for ls2k (despite its
subject mentions ls7a).

Signed-off-by: default avatarXi Ruoyao <xry111@xry111.site>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent 5a38a5d4

arch/mips/boot/dts/loongson/ls7a-pch.dtsi

+60 −13
Original line number Diff line number Diff line
@@ -70,7 +70,6 @@ pci@1a000000 { 
			device_type = "pci";

			#address-cells = <3>;

			#size-cells = <2>;

			#interrupt-cells = <2>;

			msi-parent = <&msi>;



			reg = <0 0x1a000000 0 0x02000000>,
@@ -234,7 +233,7 @@ phy1: ethernet-phy@1 { 
				};

			};



			pci_bridge@9,0 {

			pcie@9,0 {

				compatible = "pci0014,7a19.1",

						   "pci0014,7a19",

						   "pciclass060400",
@@ -244,12 +243,16 @@ pci_bridge@9,0 { 
				interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-parent = <&pic>;



				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				#interrupt-cells = <1>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;

				ranges;

			};



			pci_bridge@a,0 {

			pcie@a,0 {

				compatible = "pci0014,7a09.1",

						   "pci0014,7a09",

						   "pciclass060400",
@@ -259,12 +262,16 @@ pci_bridge@a,0 { 
				interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-parent = <&pic>;



				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				#interrupt-cells = <1>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;

				ranges;

			};



			pci_bridge@b,0 {

			pcie@b,0 {

				compatible = "pci0014,7a09.1",

						   "pci0014,7a09",

						   "pciclass060400",
@@ -274,12 +281,16 @@ pci_bridge@b,0 { 
				interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-parent = <&pic>;



				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				#interrupt-cells = <1>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;

				ranges;

			};



			pci_bridge@c,0 {

			pcie@c,0 {

				compatible = "pci0014,7a09.1",

						   "pci0014,7a09",

						   "pciclass060400",
@@ -289,12 +300,16 @@ pci_bridge@c,0 { 
				interrupts = <35 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-parent = <&pic>;



				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				#interrupt-cells = <1>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;

				ranges;

			};



			pci_bridge@d,0 {

			pcie@d,0 {

				compatible = "pci0014,7a19.1",

						   "pci0014,7a19",

						   "pciclass060400",
@@ -304,12 +319,16 @@ pci_bridge@d,0 { 
				interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-parent = <&pic>;



				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				#interrupt-cells = <1>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;

				ranges;

			};



			pci_bridge@e,0 {

			pcie@e,0 {

				compatible = "pci0014,7a09.1",

						   "pci0014,7a09",

						   "pciclass060400",
@@ -319,12 +338,16 @@ pci_bridge@e,0 { 
				interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-parent = <&pic>;



				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				#interrupt-cells = <1>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;

				ranges;

			};



			pci_bridge@f,0 {

			pcie@f,0 {

				compatible = "pci0014,7a29.1",

						   "pci0014,7a29",

						   "pciclass060400",
@@ -334,12 +357,16 @@ pci_bridge@f,0 { 
				interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-parent = <&pic>;



				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				#interrupt-cells = <1>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;

				ranges;

			};



			pci_bridge@10,0 {

			pcie@10,0 {

				compatible = "pci0014,7a19.1",

						   "pci0014,7a19",

						   "pciclass060400",
@@ -349,12 +376,16 @@ pci_bridge@10,0 { 
				interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-parent = <&pic>;



				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				#interrupt-cells = <1>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;

				ranges;

			};



			pci_bridge@11,0 {

			pcie@11,0 {

				compatible = "pci0014,7a29.1",

						   "pci0014,7a29",

						   "pciclass060400",
@@ -364,12 +395,16 @@ pci_bridge@11,0 { 
				interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-parent = <&pic>;



				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				#interrupt-cells = <1>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;

				ranges;

			};



			pci_bridge@12,0 {

			pcie@12,0 {

				compatible = "pci0014,7a19.1",

						   "pci0014,7a19",

						   "pciclass060400",
@@ -379,12 +414,16 @@ pci_bridge@12,0 { 
				interrupts = <43 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-parent = <&pic>;



				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				#interrupt-cells = <1>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;

				ranges;

			};



			pci_bridge@13,0 {

			pcie@13,0 {

				compatible = "pci0014,7a29.1",

						   "pci0014,7a29",

						   "pciclass060400",
@@ -394,12 +433,16 @@ pci_bridge@13,0 { 
				interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-parent = <&pic>;



				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				#interrupt-cells = <1>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;

				ranges;

			};



			pci_bridge@14,0 {

			pcie@14,0 {

				compatible = "pci0014,7a19.1",

						   "pci0014,7a19",

						   "pciclass060400",
@@ -409,9 +452,13 @@ pci_bridge@14,0 { 
				interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-parent = <&pic>;



				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				#interrupt-cells = <1>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;

				ranges;

			};

		};