Commit 500f9062 authored by Matt Roper's avatar Matt Roper Committed by Rodrigo Vivi
Browse files

drm/xe/adln: Enable ADL-N 



ADL-N is pretty much the same as ADL-P (i.e., Xe_LP graphics + Xe_M
media + Xe_LPD display).  However unlike ADL-P, there's no GuC hwconfig
support so the "tgl" GuC firmware should be loaded (i.e., the same
situation as ADL-S).

Acked-by: default avatarNirmoy Das <nirmoy.das@intel.com>
Reviewed-by: default avatarRavi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com>
Link: https://lore.kernel.org/r/20230419213703.3993439-2-matthew.d.roper@intel.com


Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent 5737f74e

drivers/gpu/drm/xe/xe_mocs.c

+1 −0
Original line number Diff line number Diff line
@@ -418,6 +418,7 @@ static unsigned int get_mocs_settings(struct xe_device *xe, 
	case XE_ROCKETLAKE:

	case XE_ALDERLAKE_S:

	case XE_ALDERLAKE_P:

	case XE_ALDERLAKE_N:

		info->size  = ARRAY_SIZE(gen12_mocs_desc);

		info->table = gen12_mocs_desc;

		info->n_entries = GEN9_NUM_MOCS_ENTRIES;

drivers/gpu/drm/xe/xe_pci.c

+9 −0
Original line number Diff line number Diff line
@@ -208,6 +208,14 @@ static const struct xe_device_desc adl_p_desc = { 
	},

};



static const struct xe_device_desc adl_n_desc = {

	.graphics = &graphics_xelp,

	.media = &media_xem,

	PLATFORM(XE_ALDERLAKE_N),

	.has_llc = 1,

	.require_force_probe = true,

};



#define DGFX_FEATURES \

	.is_dgfx = 1
@@ -312,6 +320,7 @@ static const struct pci_device_id pciidlist[] = { 
	XE_RKL_IDS(INTEL_VGA_DEVICE, &rkl_desc),

	XE_ADLS_IDS(INTEL_VGA_DEVICE, &adl_s_desc),

	XE_ADLP_IDS(INTEL_VGA_DEVICE, &adl_p_desc),

	XE_ADLN_IDS(INTEL_VGA_DEVICE, &adl_n_desc),

	XE_RPLP_IDS(INTEL_VGA_DEVICE, &adl_p_desc),

	XE_DG1_IDS(INTEL_VGA_DEVICE, &dg1_desc),

	XE_ATS_M_IDS(INTEL_VGA_DEVICE, &ats_m_desc),

drivers/gpu/drm/xe/xe_platform_types.h

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ enum xe_platform { 
	XE_ROCKETLAKE,

	XE_ALDERLAKE_S,

	XE_ALDERLAKE_P,

	XE_ALDERLAKE_N,

	XE_DG1,

	XE_DG2,

	XE_PVC,

drivers/gpu/drm/xe/xe_step.c

+7 −0
Original line number Diff line number Diff line
@@ -71,6 +71,10 @@ static const struct xe_step_info adlp_rpl_revids[] = { 
	[0x4] = { COMMON_GT_MEDIA_STEP(C0), .display = STEP_E0 },

};



static const struct xe_step_info adln_revids[] = {

	[0x0] = { COMMON_GT_MEDIA_STEP(A0), .display = STEP_D0 },

};



static const struct xe_step_info dg2_g10_revid_step_tbl[] = {

	[0x0] = { COMMON_GT_MEDIA_STEP(A0), .display = STEP_A0 },

	[0x1] = { COMMON_GT_MEDIA_STEP(A1), .display = STEP_A0 },
@@ -129,6 +133,9 @@ struct xe_step_info xe_step_get(struct xe_device *xe) 
	} else if (xe->info.subplatform == XE_SUBPLATFORM_DG2_G12) {

		revids = dg2_g12_revid_step_tbl;

		size = ARRAY_SIZE(dg2_g12_revid_step_tbl);

	} else if (xe->info.platform == XE_ALDERLAKE_N) {

		revids = adln_revids;

		size = ARRAY_SIZE(adln_revids);

	} else if (xe->info.subplatform == XE_SUBPLATFORM_ADLP_RPLU) {

		revids = adlp_rpl_revids;

		size = ARRAY_SIZE(adlp_rpl_revids);

drivers/gpu/drm/xe/xe_uc_fw.c

+1 −0
Original line number Diff line number Diff line
@@ -104,6 +104,7 @@ struct fw_blobs_by_type { 
	fw_def(PVC,		mmp_ver(  xe,	guc,	pvc,	70, 6, 4))	\

	fw_def(DG2,		major_ver(i915,	guc,	dg2,	70, 5))		\

	fw_def(DG1,		major_ver(i915,	guc,	dg1,	70, 5))		\

	fw_def(ALDERLAKE_N,	major_ver(i915,	guc,	tgl,	70, 5))		\

	fw_def(ALDERLAKE_P,	major_ver(i915,	guc,	adlp,	70, 5))		\

	fw_def(ALDERLAKE_S,	major_ver(i915,	guc,	tgl,	70, 5))		\

	fw_def(ROCKETLAKE,	major_ver(i915,	guc,	tgl,	70, 5))		\