Commit 5026d2ac authored by Biju Das's avatar Biju Das Committed by Marc Kleine-Budde
Browse files

can: rcar_canfd: Add struct rcanfd_regs variable to struct rcar_canfd_hw_info 



R-Car Gen3 and Gen4 have some differences in the register offsets. Add
struct rcanfd_regs variable regs to the struct rcar_canfd_hw_info to
handle these differences.

Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20250417054320.14100-16-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent 836cc711

drivers/net/can/rcar/rcar_canfd.c

+41 −7
Original line number Diff line number Diff line
@@ -300,7 +300,7 @@ 
#define RCANFD_RMND(y)			(0x00a8 + (0x04 * (y)))



/* RSCFDnCFDRFCCx / RSCFDnRFCCx */

#define RCANFD_RFCC(gpriv, x)		(reg_gen4(gpriv, 0x00c0, 0x00b8) + (0x04 * (x)))

#define RCANFD_RFCC(gpriv, x)		((gpriv)->info->regs->rfcc + (0x04 * (x)))

/* RSCFDnCFDRFSTSx / RSCFDnRFSTSx */

#define RCANFD_RFSTS(gpriv, x)		(RCANFD_RFCC(gpriv, x) + 0x20)

/* RSCFDnCFDRFPCTRx / RSCFDnRFPCTRx */
@@ -310,13 +310,13 @@ 


/* RSCFDnCFDCFCCx / RSCFDnCFCCx */

#define RCANFD_CFCC(gpriv, ch, idx) \

	(reg_gen4(gpriv, 0x0120, 0x0118) + (0x0c * (ch)) + (0x04 * (idx)))

	((gpriv)->info->regs->cfcc + (0x0c * (ch)) + (0x04 * (idx)))

/* RSCFDnCFDCFSTSx / RSCFDnCFSTSx */

#define RCANFD_CFSTS(gpriv, ch, idx) \

	(reg_gen4(gpriv, 0x01e0, 0x0178) + (0x0c * (ch)) + (0x04 * (idx)))

	((gpriv)->info->regs->cfsts + (0x0c * (ch)) + (0x04 * (idx)))

/* RSCFDnCFDCFPCTRx / RSCFDnCFPCTRx */

#define RCANFD_CFPCTR(gpriv, ch, idx) \

	(reg_gen4(gpriv, 0x0240, 0x01d8) + (0x0c * (ch)) + (0x04 * (idx)))

	((gpriv)->info->regs->cfpctr + (0x0c * (ch)) + (0x04 * (idx)))



/* RSCFDnCFDFESTS / RSCFDnFESTS */

#define RCANFD_FESTS			(0x0238)
@@ -432,7 +432,7 @@ 
/* CAN FD mode specific register map */



/* RSCFDnCFDCmXXX -> RCANFD_F_XXX(m) */

#define RCANFD_F_DCFG(gpriv, m)		(reg_gen4(gpriv, 0x1400, 0x0500) + (0x20 * (m)))

#define RCANFD_F_DCFG(gpriv, m)		((gpriv)->info->regs->f_dcfg + (0x20 * (m)))

#define RCANFD_F_CFDCFG(m)		(0x0504 + (0x20 * (m)))

#define RCANFD_F_CFDCTR(m)		(0x0508 + (0x20 * (m)))

#define RCANFD_F_CFDSTS(m)		(0x050c + (0x20 * (m)))
@@ -448,7 +448,7 @@ 
#define RCANFD_F_RMDF(q, b)		(0x200c + (0x04 * (b)) + (0x20 * (q)))



/* RSCFDnCFDRFXXx -> RCANFD_F_RFXX(x) */

#define RCANFD_F_RFOFFSET(gpriv)	reg_gen4(gpriv, 0x6000, 0x3000)

#define RCANFD_F_RFOFFSET(gpriv)	((gpriv)->info->regs->rfoffset)

#define RCANFD_F_RFID(gpriv, x)		(RCANFD_F_RFOFFSET(gpriv) + (0x80 * (x)))

#define RCANFD_F_RFPTR(gpriv, x)	(RCANFD_F_RFOFFSET(gpriv) + 0x04 + (0x80 * (x)))

#define RCANFD_F_RFFDSTS(gpriv, x)	(RCANFD_F_RFOFFSET(gpriv) + 0x08 + (0x80 * (x)))
@@ -456,7 +456,7 @@ 
	(RCANFD_F_RFOFFSET(gpriv) + 0x0c + (0x80 * (x)) + (0x04 * (df)))



/* RSCFDnCFDCFXXk -> RCANFD_F_CFXX(ch, k) */

#define RCANFD_F_CFOFFSET(gpriv)	reg_gen4(gpriv, 0x6400, 0x3400)

#define RCANFD_F_CFOFFSET(gpriv)	((gpriv)->info->regs->cfoffset)



#define RCANFD_F_CFID(gpriv, ch, idx) \

	(RCANFD_F_CFOFFSET(gpriv) + (0x180 * (ch)) + (0x80 * (idx)))
@@ -505,9 +505,20 @@ 


struct rcar_canfd_global;



struct rcar_canfd_regs {

	u16 rfcc;	/* RX FIFO Configuration/Control Register */

	u16 cfcc;	/* Common FIFO Configuration/Control Register */

	u16 cfsts;	/* Common FIFO Status Register */

	u16 cfpctr;	/* Common FIFO Pointer Control Register */

	u16 f_dcfg;	/* Global FD Configuration Register */

	u16 rfoffset;	/* Receive FIFO buffer access ID register */

	u16 cfoffset;	/* Transmit/receive FIFO buffer access ID register */

};



struct rcar_canfd_hw_info {

	const struct can_bittiming_const *nom_bittiming;

	const struct can_bittiming_const *data_bittiming;

	const struct rcar_canfd_regs *regs;

	u8 rnc_field_width;

	u8 max_aflpn;

	u8 max_cftml;
@@ -612,9 +623,30 @@ static const struct can_bittiming_const rcar_canfd_bittiming_const = { 
	.brp_inc = 1,

};



static const struct rcar_canfd_regs rcar_gen3_regs = {

	.rfcc = 0x00b8,

	.cfcc = 0x0118,

	.cfsts = 0x0178,

	.cfpctr = 0x01d8,

	.f_dcfg = 0x0500,

	.rfoffset = 0x3000,

	.cfoffset = 0x3400,

};



static const struct rcar_canfd_regs rcar_gen4_regs = {

	.rfcc = 0x00c0,

	.cfcc = 0x0120,

	.cfsts = 0x01e0,

	.cfpctr = 0x0240,

	.f_dcfg = 0x1400,

	.rfoffset = 0x6000,

	.cfoffset = 0x6400,

};



static const struct rcar_canfd_hw_info rcar_gen3_hw_info = {

	.nom_bittiming = &rcar_canfd_gen3_nom_bittiming_const,

	.data_bittiming = &rcar_canfd_gen3_data_bittiming_const,

	.regs = &rcar_gen3_regs,

	.rnc_field_width = 8,

	.max_aflpn = 31,

	.max_cftml = 15,
@@ -628,6 +660,7 @@ static const struct rcar_canfd_hw_info rcar_gen3_hw_info = { 
static const struct rcar_canfd_hw_info rcar_gen4_hw_info = {

	.nom_bittiming = &rcar_canfd_gen4_nom_bittiming_const,

	.data_bittiming = &rcar_canfd_gen4_data_bittiming_const,

	.regs = &rcar_gen4_regs,

	.rnc_field_width = 16,

	.max_aflpn = 127,

	.max_cftml = 31,
@@ -641,6 +674,7 @@ static const struct rcar_canfd_hw_info rcar_gen4_hw_info = { 
static const struct rcar_canfd_hw_info rzg2l_hw_info = {

	.nom_bittiming = &rcar_canfd_gen3_nom_bittiming_const,

	.data_bittiming = &rcar_canfd_gen3_data_bittiming_const,

	.regs = &rcar_gen3_regs,

	.rnc_field_width = 8,

	.max_aflpn = 31,

	.max_cftml = 15,