Commit 504f9bdd authored by Michael Strauss's avatar Michael Strauss Committed by Alex Deucher
Browse files

drm/amd/display: Fix FIXED_VS retimer clock gen source override 



[WHY]
For SQ128 pattern some vendor-specific overrides are required.
Previously a hardcoded clock gen source value was incorrectly programmed,
causing our override to retimer's clock source override to be ignored.
Due to some PHY issues on certain APU programs, we see failures on retimer
bypass ports extend to electrical testing downstream of PHY due to some host
clock jitter which the retimer follows.

[HOW]
Fix typo to use correct clock gen source override of 0xC4 rather than 0x4C.

Reviewed-by: default avatarCharlene Liu <charlene.liu@amd.com>
Signed-off-by: default avatarMichael Strauss <michael.strauss@amd.com>
Signed-off-by: default avatarIvan Lipski <ivan.lipski@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 42fcf48f

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c

+1 −1
Original line number Diff line number Diff line
@@ -74,7 +74,7 @@ static void dp_hpo_fixed_vs_pe_retimer_set_tx_ffe(struct dc_link *link, 
static void dp_hpo_fixed_vs_pe_retimer_program_override_test_pattern(struct dc_link *link,

		struct encoder_set_dp_phy_pattern_param *tp_params)

{

	uint8_t clk_src = 0x4C;

	uint8_t clk_src = 0xC4;

	uint8_t pattern = 0x4F; /* SQ128 */



	const uint8_t vendor_lttpr_write_data_pg0[4] = {0x1, 0x11, 0x0, 0x0};