Unverified Commit 508f3d3b authored by Chin-Ting Kuo's avatar Chin-Ting Kuo Committed by Mark Brown
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spi: aspeed: Use phys_addr_t for bus addresses to support 64-bit platforms



Update bus address types from u32 to phys_addr_t to support systems with
64-bit memory address space. This change ensures compatibility with
upcoming SoCs that extend the system bus beyond 32-bit, while maintaining
support for existing platforms.

Signed-off-by: default avatarChin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Link: https://patch.msgid.link/20251114101042.1520997-4-chin-ting_kuo@aspeedtech.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent be6671d3
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+17 −15
Original line number Diff line number Diff line
@@ -82,9 +82,10 @@ struct aspeed_spi_data {
	u32	hdiv_max;
	u32	min_window_size;

	u32 (*segment_start)(struct aspeed_spi *aspi, u32 reg);
	u32 (*segment_end)(struct aspeed_spi *aspi, u32 reg);
	u32 (*segment_reg)(struct aspeed_spi *aspi, u32 start, u32 end);
	phys_addr_t (*segment_start)(struct aspeed_spi *aspi, u32 reg);
	phys_addr_t (*segment_end)(struct aspeed_spi *aspi, u32 reg);
	u32 (*segment_reg)(struct aspeed_spi *aspi, phys_addr_t start,
			   phys_addr_t end);
	int (*adjust_window)(struct aspeed_spi *aspi);
	u32 (*get_clk_div)(struct aspeed_spi_chip *chip, u32 hz);
	int (*calibrate)(struct aspeed_spi_chip *chip, u32 hdiv,
@@ -97,7 +98,7 @@ struct aspeed_spi {
	const struct aspeed_spi_data	*data;

	void __iomem		*regs;
	u32			 ahb_base_phy;
	phys_addr_t		 ahb_base_phy;
	u32			 ahb_window_size;
	u32			 num_cs;
	struct device		*dev;
@@ -484,9 +485,9 @@ static int aspeed_spi_chip_set_default_window(struct aspeed_spi *aspi)
	/* Assign the minimum window size to each CS */
	for (cs = 0; cs < aspi->num_cs; cs++) {
		aspi->chips[cs].ahb_window_size = aspi->data->min_window_size;
		dev_dbg(aspi->dev, "CE%d default window [ 0x%.8x - 0x%.8x ]",
			cs, aspi->ahb_base_phy + aspi->data->min_window_size * cs,
			aspi->ahb_base_phy + aspi->data->min_window_size * cs - 1);
		dev_dbg(aspi->dev, "CE%d default window [ 0x%.9llx - 0x%.9llx ]",
			cs, (u64)(aspi->ahb_base_phy + aspi->data->min_window_size * cs),
			(u64)(aspi->ahb_base_phy + aspi->data->min_window_size * cs - 1));
	}

	/* Close unused CS */
@@ -930,17 +931,18 @@ static void aspeed_spi_remove(struct platform_device *pdev)
 * The address range is encoded with absolute addresses in the overall
 * mapping window.
 */
static u32 aspeed_spi_segment_start(struct aspeed_spi *aspi, u32 reg)
static phys_addr_t aspeed_spi_segment_start(struct aspeed_spi *aspi, u32 reg)
{
	return ((reg >> 16) & 0xFF) << 23;
}

static u32 aspeed_spi_segment_end(struct aspeed_spi *aspi, u32 reg)
static phys_addr_t aspeed_spi_segment_end(struct aspeed_spi *aspi, u32 reg)
{
	return ((reg >> 24) & 0xFF) << 23;
}

static u32 aspeed_spi_segment_reg(struct aspeed_spi *aspi, u32 start, u32 end)
static u32 aspeed_spi_segment_reg(struct aspeed_spi *aspi,
				  phys_addr_t start, phys_addr_t end)
{
	return (((start >> 23) & 0xFF) << 16) | (((end >> 23) & 0xFF) << 24);
}
@@ -952,7 +954,7 @@ static u32 aspeed_spi_segment_reg(struct aspeed_spi *aspi, u32 start, u32 end)

#define AST2600_SEG_ADDR_MASK 0x0ff00000

static u32 aspeed_spi_segment_ast2600_start(struct aspeed_spi *aspi,
static phys_addr_t aspeed_spi_segment_ast2600_start(struct aspeed_spi *aspi,
						    u32 reg)
{
	u32 start_offset = (reg << 16) & AST2600_SEG_ADDR_MASK;
@@ -960,7 +962,7 @@ static u32 aspeed_spi_segment_ast2600_start(struct aspeed_spi *aspi,
	return aspi->ahb_base_phy + start_offset;
}

static u32 aspeed_spi_segment_ast2600_end(struct aspeed_spi *aspi,
static phys_addr_t aspeed_spi_segment_ast2600_end(struct aspeed_spi *aspi,
						  u32 reg)
{
	u32 end_offset = reg & AST2600_SEG_ADDR_MASK;
@@ -973,7 +975,7 @@ static u32 aspeed_spi_segment_ast2600_end(struct aspeed_spi *aspi,
}

static u32 aspeed_spi_segment_ast2600_reg(struct aspeed_spi *aspi,
					  u32 start, u32 end)
					  phys_addr_t start, phys_addr_t end)
{
	/* disable zero size segments */
	if (start == end)