Commit 538c06e3 authored by Bibo Mao's avatar Bibo Mao Committed by Huacai Chen
Browse files

LoongArch: KVM: Add address alignment check in pch_pic register access 



With pch_pic device, its register is based on MMIO address space,
different access size 1/2/4/8 is supported. And base address should
be naturally aligned with its access size, here add alignment check
in its register access emulation function.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarBibo Mao <maobibo@loongson.cn>
Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
parent 0dfd9ea7

arch/loongarch/kvm/intc/pch_pic.c

+10 −0
Original line number Diff line number Diff line
@@ -195,6 +195,11 @@ static int kvm_pch_pic_read(struct kvm_vcpu *vcpu, 
		return -EINVAL;

	}



	if (addr & (len - 1)) {

		kvm_err("%s: pch pic not aligned addr %llx len %d\n", __func__, addr, len);

		return -EINVAL;

	}



	/* statistics of pch pic reading */

	vcpu->stat.pch_pic_read_exits++;

	ret = loongarch_pch_pic_read(s, addr, len, val);
@@ -302,6 +307,11 @@ static int kvm_pch_pic_write(struct kvm_vcpu *vcpu, 
		return -EINVAL;

	}



	if (addr & (len - 1)) {

		kvm_err("%s: pch pic not aligned addr %llx len %d\n", __func__, addr, len);

		return -EINVAL;

	}



	/* statistics of pch pic writing */

	vcpu->stat.pch_pic_write_exits++;

	ret = loongarch_pch_pic_write(s, addr, len, val);