Commit 5396a70e authored by Alex Hung's avatar Alex Hung Committed by Alex Deucher
Browse files

drm/amd/display: Check pipe offset before setting vblank 



pipe_ctx has a size of MAX_PIPES so checking its index before accessing
the array.

This fixes an OVERRUN issue reported by Coverity.

Reviewed-by: default avatarRodrigo Siqueira <rodrigo.siqueira@amd.com>
Acked-by: default avatarWayne Lin <wayne.lin@amd.com>
Signed-off-by: default avatarAlex Hung <alex.hung@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent bd31e502

drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

+6 −2
Original line number Diff line number Diff line
@@ -211,8 +211,12 @@ bool dce110_vblank_set(struct irq_service *irq_service, 
						   info->ext_id);

	uint8_t pipe_offset = dal_irq_src - IRQ_TYPE_VBLANK;



	struct timing_generator *tg =

			dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg;

	struct timing_generator *tg;



	if (pipe_offset >= MAX_PIPES)

		return false;



	tg = dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg;



	if (enable) {

		if (!tg || !tg->funcs->arm_vert_intr(tg, 2)) {