Commit 53f468aa authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915/dp_mst: Program the DSC PPS SDP for each stream



Atm the DSC PPS SDP is programmed only if the first stream is compressed
and then it's programmed only for the first stream. This left all other
compressed streams blank. Program the SDP for all streams.

v2:
- Rebase on upstream include "intel_vdsc.h" change.

Reviewed-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231107001505.3370108-3-imre.deak@intel.com
parent 5d78cd80
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+7 −5
Original line number Diff line number Diff line
@@ -2505,6 +2505,7 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state,
	/* 6.o Configure and enable FEC if needed */
	intel_ddi_enable_fec(encoder, crtc_state);

	if (!is_mst)
		intel_dsc_dp_pps_write(encoder, crtc_state);
}

@@ -2643,6 +2644,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
	/* 7.l Configure and enable FEC if needed */
	intel_ddi_enable_fec(encoder, crtc_state);

	if (!is_mst)
		intel_dsc_dp_pps_write(encoder, crtc_state);
}

@@ -2705,11 +2707,11 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,

	intel_ddi_enable_fec(encoder, crtc_state);

	if (!is_mst)
	if (!is_mst) {
		intel_ddi_enable_transcoder_clock(encoder, crtc_state);

		intel_dsc_dp_pps_write(encoder, crtc_state);
	}
}

static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
				    struct intel_encoder *encoder,
+1 −0
Original line number Diff line number Diff line
@@ -860,6 +860,7 @@ static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
	if (DISPLAY_VER(dev_priv) < 12 || !first_mst_stream)
		intel_ddi_enable_transcoder_clock(encoder, pipe_config);

	intel_dsc_dp_pps_write(&dig_port->base, pipe_config);
	intel_ddi_set_dp_msa(pipe_config, conn_state);
}