Commit 54141406 authored by Tao Zhou's avatar Tao Zhou Committed by Alex Deucher
Browse files

drm/amdgpu: skip writing eeprom when PMFW manages RAS data



Only update bad page number in legacy eeprom write path.

v2: add null pointer check for con.

Signed-off-by: default avatarTao Zhou <tao.zhou1@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 62320fb8
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+19 −1
Original line number Diff line number Diff line
@@ -871,6 +871,18 @@ amdgpu_ras_eeprom_update_header(struct amdgpu_ras_eeprom_control *control)
	return res;
}

int amdgpu_ras_eeprom_update_record_num(struct amdgpu_ras_eeprom_control *control)
{
	struct amdgpu_device *adev = to_amdgpu_device(control);

	if (!amdgpu_ras_smu_eeprom_supported(adev))
		return 0;

	control->ras_num_recs_old = control->ras_num_recs;
	return amdgpu_ras_smu_get_badpage_count(adev,
			&(control->ras_num_recs), 12);
}

/**
 * amdgpu_ras_eeprom_append -- append records to the EEPROM RAS table
 * @control: pointer to control structure
@@ -889,12 +901,18 @@ int amdgpu_ras_eeprom_append(struct amdgpu_ras_eeprom_control *control,
			     const u32 num)
{
	struct amdgpu_device *adev = to_amdgpu_device(control);
	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
	int res, i;
	uint64_t nps = AMDGPU_NPS1_PARTITION_MODE;

	if (!__is_ras_eeprom_supported(adev))
	if (!__is_ras_eeprom_supported(adev) || !con)
		return 0;

	if (amdgpu_ras_smu_eeprom_supported(adev)) {
		control->ras_num_bad_pages = con->bad_page_num;
		return 0;
	}

	if (num == 0) {
		dev_err(adev->dev, "will not append 0 records\n");
		return -EINVAL;
+3 −0
Original line number Diff line number Diff line
@@ -82,6 +82,7 @@ struct amdgpu_ras_eeprom_control {
	/* Number of records in the table.
	 */
	u32 ras_num_recs;
	u32 ras_num_recs_old;

	/* the bad page number is ras_num_recs or
	 * ras_num_recs * umc.retire_unit
@@ -190,6 +191,8 @@ int amdgpu_ras_eeprom_read_idx(struct amdgpu_ras_eeprom_control *control,
			struct eeprom_table_record *record, u32 rec_idx,
			const u32 num);

int amdgpu_ras_eeprom_update_record_num(struct amdgpu_ras_eeprom_control *control);

extern const struct file_operations amdgpu_ras_debugfs_eeprom_size_ops;
extern const struct file_operations amdgpu_ras_debugfs_eeprom_table_ops;