Commit 55ed120d authored by David Yat Sin's avatar David Yat Sin Committed by Alex Deucher
Browse files

drm/amdkfd: hard-code cacheline for gc943,gc944 



Cacheline size is not available in IP discovery for gc943,gc944.

Signed-off-by: default avatarDavid Yat Sin <David.YatSin@amd.com>
Reviewed-by: default avatarHarish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent 33114f10

drivers/gpu/drm/amd/amdkfd/kfd_crat.c

+6 −0
Original line number Diff line number Diff line
@@ -1510,6 +1510,8 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev, 
	if (adev->gfx.config.gc_tcp_size_per_cu) {

		pcache_info[i].cache_size = adev->gfx.config.gc_tcp_size_per_cu;

		pcache_info[i].cache_level = 1;

		/* Cacheline size not available in IP discovery for gc943,gc944 */

		pcache_info[i].cache_line_size = 128;

		pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |

					CRAT_CACHE_FLAGS_DATA_CACHE |

					CRAT_CACHE_FLAGS_SIMD_CACHE);
@@ -1521,6 +1523,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev, 
		pcache_info[i].cache_size =

			adev->gfx.config.gc_l1_instruction_cache_size_per_sqc;

		pcache_info[i].cache_level = 1;

		pcache_info[i].cache_line_size = 64;

		pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |

					CRAT_CACHE_FLAGS_INST_CACHE |

					CRAT_CACHE_FLAGS_SIMD_CACHE);
@@ -1531,6 +1534,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev, 
	if (adev->gfx.config.gc_l1_data_cache_size_per_sqc) {

		pcache_info[i].cache_size = adev->gfx.config.gc_l1_data_cache_size_per_sqc;

		pcache_info[i].cache_level = 1;

		pcache_info[i].cache_line_size = 64;

		pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |

					CRAT_CACHE_FLAGS_DATA_CACHE |

					CRAT_CACHE_FLAGS_SIMD_CACHE);
@@ -1541,6 +1545,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev, 
	if (adev->gfx.config.gc_tcc_size) {

		pcache_info[i].cache_size = adev->gfx.config.gc_tcc_size;

		pcache_info[i].cache_level = 2;

		pcache_info[i].cache_line_size = 128;

		pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |

					CRAT_CACHE_FLAGS_DATA_CACHE |

					CRAT_CACHE_FLAGS_SIMD_CACHE);
@@ -1551,6 +1556,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev, 
	if (adev->gmc.mall_size) {

		pcache_info[i].cache_size = adev->gmc.mall_size / 1024;

		pcache_info[i].cache_level = 3;

		pcache_info[i].cache_line_size = 64;

		pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |

					CRAT_CACHE_FLAGS_DATA_CACHE |

					CRAT_CACHE_FLAGS_SIMD_CACHE);