Commit 5666e27a authored by Jouni Högander's avatar Jouni Högander
Browse files

drm/i915/psr: Do not read PSR2_SU_STATUS on AlderLake and onwards 



Bspec comment on PSR2_SU_STATUS:

"This register has been tied-off since DG2/ADL-P (it returns zeros only)
and it has been removed on Xe2_LPD."

v2: fix inversed logic

Bspec: 69889
Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarMika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250516063019.2126702-1-jouni.hogander@intel.com
parent 1c570143

drivers/gpu/drm/i915/display/intel_psr.c

+20 −14
Original line number Diff line number Diff line
@@ -4020,6 +4020,11 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp) 
		u32 su_frames_val[3];

		int frame;



		/*

		 * PSR2_SU_STATUS register has been tied-off since DG2/ADL-P

		 * (it returns zeros only) and it has been removed on Xe2_LPD.

		 */

		if (DISPLAY_VER(display) < 13) {

			/*

			 * Reading all 3 registers before hand to minimize crossing a

			 * frame boundary between register reads
@@ -4040,6 +4045,7 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp) 
				su_blocks = su_blocks >> PSR2_SU_STATUS_SHIFT(frame);

				seq_printf(m, "%d\t%d\n", frame, su_blocks);

			}

		}



		seq_printf(m, "PSR2 selective fetch: %s\n",

			   str_enabled_disabled(psr->psr2_sel_fetch_enabled));