Commit 57222f07 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
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arm64: dts: qcom: sc8180x: Affirm IDR0.CCTW on apps_smmu 



On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent
pagetable walk via the IDR0 register. This however is not respected by
the arm-smmu driver unless dma-coherent is set.

Mark the node as dma-coherent to ensure this (and other) implementations
take this coherency into account.

Signed-off-by: default avatarKonrad Dybcio <quic_kdybcio@quicinc.com>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp)
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3
Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-3-5b3a8662403d@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 3d89c198

arch/arm64/boot/dts/qcom/sc8180x.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -3662,7 +3662,7 @@ apps_smmu: iommu@15000000 { 
				     <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 775 IRQ_TYPE_LEVEL_HIGH>;



			dma-coherent;

		};



		remoteproc_adsp: remoteproc@17300000 {