Commit 57d20a43 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/radeon: add the infrastructure for concurrent buffer access 



This allows us to specify if we want to sync to
the shared fences of a reservation object or not.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ae9c0af2

drivers/gpu/drm/radeon/cik.c

+13 −12
Original line number Diff line number Diff line
@@ -3959,18 +3959,19 @@ bool cik_semaphore_ring_emit(struct radeon_device *rdev, 
 * @src_offset: src GPU address

 * @dst_offset: dst GPU address

 * @num_gpu_pages: number of GPU pages to xfer

 * @fence: radeon fence object

 * @resv: reservation object to sync to

 *

 * Copy GPU paging using the CP DMA engine (CIK+).

 * Used by the radeon ttm implementation to move pages if

 * registered as the asic copy callback.

 */

int cik_copy_cpdma(struct radeon_device *rdev,

struct radeon_fence *cik_copy_cpdma(struct radeon_device *rdev,

				    uint64_t src_offset, uint64_t dst_offset,

				    unsigned num_gpu_pages,

		   struct radeon_fence **fence)

				    struct reservation_object *resv)

{

	struct radeon_semaphore *sem = NULL;

	struct radeon_fence *fence;

	int ring_index = rdev->asic->copy.blit_ring_index;

	struct radeon_ring *ring = &rdev->ring[ring_index];

	u32 size_in_bytes, cur_size_in_bytes, control;
@@ -3980,7 +3981,7 @@ int cik_copy_cpdma(struct radeon_device *rdev, 
	r = radeon_semaphore_create(rdev, &sem);

	if (r) {

		DRM_ERROR("radeon: moving bo (%d).\n", r);

		return r;

		return ERR_PTR(r);

	}



	size_in_bytes = (num_gpu_pages << RADEON_GPU_PAGE_SHIFT);
@@ -3989,10 +3990,10 @@ int cik_copy_cpdma(struct radeon_device *rdev, 
	if (r) {

		DRM_ERROR("radeon: moving bo (%d).\n", r);

		radeon_semaphore_free(rdev, &sem, NULL);

		return r;

		return ERR_PTR(r);

	}



	radeon_semaphore_sync_to(sem, *fence);

	radeon_semaphore_sync_resv(sem, resv, false);

	radeon_semaphore_sync_rings(rdev, sem, ring->idx);



	for (i = 0; i < num_loops; i++) {
@@ -4014,17 +4015,17 @@ int cik_copy_cpdma(struct radeon_device *rdev, 
		dst_offset += cur_size_in_bytes;

	}



	r = radeon_fence_emit(rdev, fence, ring->idx);

	r = radeon_fence_emit(rdev, &fence, ring->idx);

	if (r) {

		radeon_ring_unlock_undo(rdev, ring);

		radeon_semaphore_free(rdev, &sem, NULL);

		return r;

		return ERR_PTR(r);

	}



	radeon_ring_unlock_commit(rdev, ring, false);

	radeon_semaphore_free(rdev, &sem, *fence);

	radeon_semaphore_free(rdev, &sem, fence);



	return r;

	return fence;

}



/*

drivers/gpu/drm/radeon/cik_sdma.c

+13 −12
Original line number Diff line number Diff line
@@ -537,18 +537,19 @@ void cik_sdma_fini(struct radeon_device *rdev) 
 * @src_offset: src GPU address

 * @dst_offset: dst GPU address

 * @num_gpu_pages: number of GPU pages to xfer

 * @fence: radeon fence object

 * @resv: reservation object to sync to

 *

 * Copy GPU paging using the DMA engine (CIK).

 * Used by the radeon ttm implementation to move pages if

 * registered as the asic copy callback.

 */

int cik_copy_dma(struct radeon_device *rdev,

struct radeon_fence *cik_copy_dma(struct radeon_device *rdev,

				  uint64_t src_offset, uint64_t dst_offset,

				  unsigned num_gpu_pages,

		 struct radeon_fence **fence)

				  struct reservation_object *resv)

{

	struct radeon_semaphore *sem = NULL;

	struct radeon_fence *fence;

	int ring_index = rdev->asic->copy.dma_ring_index;

	struct radeon_ring *ring = &rdev->ring[ring_index];

	u32 size_in_bytes, cur_size_in_bytes;
@@ -558,7 +559,7 @@ int cik_copy_dma(struct radeon_device *rdev, 
	r = radeon_semaphore_create(rdev, &sem);

	if (r) {

		DRM_ERROR("radeon: moving bo (%d).\n", r);

		return r;

		return ERR_PTR(r);

	}



	size_in_bytes = (num_gpu_pages << RADEON_GPU_PAGE_SHIFT);
@@ -567,10 +568,10 @@ int cik_copy_dma(struct radeon_device *rdev, 
	if (r) {

		DRM_ERROR("radeon: moving bo (%d).\n", r);

		radeon_semaphore_free(rdev, &sem, NULL);

		return r;

		return ERR_PTR(r);

	}



	radeon_semaphore_sync_to(sem, *fence);

	radeon_semaphore_sync_resv(sem, resv, false);

	radeon_semaphore_sync_rings(rdev, sem, ring->idx);



	for (i = 0; i < num_loops; i++) {
@@ -589,17 +590,17 @@ int cik_copy_dma(struct radeon_device *rdev, 
		dst_offset += cur_size_in_bytes;

	}



	r = radeon_fence_emit(rdev, fence, ring->idx);

	r = radeon_fence_emit(rdev, &fence, ring->idx);

	if (r) {

		radeon_ring_unlock_undo(rdev, ring);

		radeon_semaphore_free(rdev, &sem, NULL);

		return r;

		return ERR_PTR(r);

	}



	radeon_ring_unlock_commit(rdev, ring, false);

	radeon_semaphore_free(rdev, &sem, *fence);

	radeon_semaphore_free(rdev, &sem, fence);



	return r;

	return fence;

}



/**

drivers/gpu/drm/radeon/evergreen_dma.c

+13 −11
Original line number Diff line number Diff line
@@ -104,12 +104,14 @@ void evergreen_dma_ring_ib_execute(struct radeon_device *rdev, 
 * Used by the radeon ttm implementation to move pages if

 * registered as the asic copy callback.

 */

int evergreen_copy_dma(struct radeon_device *rdev,

		       uint64_t src_offset, uint64_t dst_offset,

struct radeon_fence *evergreen_copy_dma(struct radeon_device *rdev,

					uint64_t src_offset,

					uint64_t dst_offset,

					unsigned num_gpu_pages,

		       struct radeon_fence **fence)

					struct reservation_object *resv)

{

	struct radeon_semaphore *sem = NULL;

	struct radeon_fence *fence;

	int ring_index = rdev->asic->copy.dma_ring_index;

	struct radeon_ring *ring = &rdev->ring[ring_index];

	u32 size_in_dw, cur_size_in_dw;
@@ -119,7 +121,7 @@ int evergreen_copy_dma(struct radeon_device *rdev, 
	r = radeon_semaphore_create(rdev, &sem);

	if (r) {

		DRM_ERROR("radeon: moving bo (%d).\n", r);

		return r;

		return ERR_PTR(r);

	}



	size_in_dw = (num_gpu_pages << RADEON_GPU_PAGE_SHIFT) / 4;
@@ -128,10 +130,10 @@ int evergreen_copy_dma(struct radeon_device *rdev, 
	if (r) {

		DRM_ERROR("radeon: moving bo (%d).\n", r);

		radeon_semaphore_free(rdev, &sem, NULL);

		return r;

		return ERR_PTR(r);

	}



	radeon_semaphore_sync_to(sem, *fence);

	radeon_semaphore_sync_resv(sem, resv, false);

	radeon_semaphore_sync_rings(rdev, sem, ring->idx);



	for (i = 0; i < num_loops; i++) {
@@ -148,17 +150,17 @@ int evergreen_copy_dma(struct radeon_device *rdev, 
		dst_offset += cur_size_in_dw * 4;

	}



	r = radeon_fence_emit(rdev, fence, ring->idx);

	r = radeon_fence_emit(rdev, &fence, ring->idx);

	if (r) {

		radeon_ring_unlock_undo(rdev, ring);

		radeon_semaphore_free(rdev, &sem, NULL);

		return r;

		return ERR_PTR(r);

	}



	radeon_ring_unlock_commit(rdev, ring, false);

	radeon_semaphore_free(rdev, &sem, *fence);

	radeon_semaphore_free(rdev, &sem, fence);



	return r;

	return fence;

}



/**

drivers/gpu/drm/radeon/r100.c

+12 −9
Original line number Diff line number Diff line
@@ -855,13 +855,14 @@ bool r100_semaphore_ring_emit(struct radeon_device *rdev, 
	return false;

}



int r100_copy_blit(struct radeon_device *rdev,

struct radeon_fence *r100_copy_blit(struct radeon_device *rdev,

				    uint64_t src_offset,

				    uint64_t dst_offset,

				    unsigned num_gpu_pages,

		   struct radeon_fence **fence)

				    struct reservation_object *resv)

{

	struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];

	struct radeon_fence *fence;

	uint32_t cur_pages;

	uint32_t stride_bytes = RADEON_GPU_PAGE_SIZE;

	uint32_t pitch;
@@ -882,7 +883,7 @@ int r100_copy_blit(struct radeon_device *rdev, 
	r = radeon_ring_lock(rdev, ring, ndw);

	if (r) {

		DRM_ERROR("radeon: moving bo (%d) asking for %u dw.\n", r, ndw);

		return -EINVAL;

		return ERR_PTR(-EINVAL);

	}

	while (num_gpu_pages > 0) {

		cur_pages = num_gpu_pages;
@@ -922,11 +923,13 @@ int r100_copy_blit(struct radeon_device *rdev, 
			  RADEON_WAIT_2D_IDLECLEAN |

			  RADEON_WAIT_HOST_IDLECLEAN |

			  RADEON_WAIT_DMA_GUI_IDLE);

	if (fence) {

		r = radeon_fence_emit(rdev, fence, RADEON_RING_TYPE_GFX_INDEX);

	r = radeon_fence_emit(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX);

	if (r) {

		radeon_ring_unlock_undo(rdev, ring);

		return ERR_PTR(r);

	}

	radeon_ring_unlock_commit(rdev, ring, false);

	return r;

	return fence;

}



static int r100_cp_wait_for_idle(struct radeon_device *rdev)

drivers/gpu/drm/radeon/r200.c

+12 −9
Original line number Diff line number Diff line
@@ -80,13 +80,14 @@ static int r200_get_vtx_size_0(uint32_t vtx_fmt_0) 
	return vtx_size;

}



int r200_copy_dma(struct radeon_device *rdev,

struct radeon_fence *r200_copy_dma(struct radeon_device *rdev,

				   uint64_t src_offset,

				   uint64_t dst_offset,

				   unsigned num_gpu_pages,

		  struct radeon_fence **fence)

				   struct reservation_object *resv)

{

	struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];

	struct radeon_fence *fence;

	uint32_t size;

	uint32_t cur_size;

	int i, num_loops;
@@ -98,7 +99,7 @@ int r200_copy_dma(struct radeon_device *rdev, 
	r = radeon_ring_lock(rdev, ring, num_loops * 4 + 64);

	if (r) {

		DRM_ERROR("radeon: moving bo (%d).\n", r);

		return r;

		return ERR_PTR(r);

	}

	/* Must wait for 2D idle & clean before DMA or hangs might happen */

	radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
@@ -118,11 +119,13 @@ int r200_copy_dma(struct radeon_device *rdev, 
	}

	radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));

	radeon_ring_write(ring, RADEON_WAIT_DMA_GUI_IDLE);

	if (fence) {

		r = radeon_fence_emit(rdev, fence, RADEON_RING_TYPE_GFX_INDEX);

	r = radeon_fence_emit(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX);

	if (r) {

		radeon_ring_unlock_undo(rdev, ring);

		return ERR_PTR(r);

	}

	radeon_ring_unlock_commit(rdev, ring, false);

	return r;

	return fence;

}