Commit 5a1cb35b authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
Browse files

clk: renesas: r9a09g047: Add ICU clock/reset 



Add ICU clock and reset entries.

Reviewed-by: default avatarFabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: default avatarTommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250128104714.80807-3-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 7f22a298

drivers/clk/renesas/r9a09g047-cpg.c

+3 −0
Original line number Diff line number Diff line
@@ -94,6 +94,8 @@ static const struct cpg_core_clk r9a09g047_core_clks[] __initconst = { 
};



static const struct rzv2h_mod_clk r9a09g047_mod_clks[] __initconst = {

	DEF_MOD_CRITICAL("icu_0_pclk_i",	CLK_PLLCM33_DIV16, 0, 5, 0, 5,

						BUS_MSTOP_NONE),

	DEF_MOD_CRITICAL("gic_0_gicclk",	CLK_PLLDTY_ACPU_DIV4, 1, 3, 0, 19,

						BUS_MSTOP(3, BIT(5))),

	DEF_MOD("wdt_1_clkp",			CLK_PLLCLN_DIV16, 4, 13, 2, 13,
@@ -156,6 +158,7 @@ static const struct rzv2h_mod_clk r9a09g047_mod_clks[] __initconst = { 


static const struct rzv2h_reset r9a09g047_resets[] __initconst = {

	DEF_RST(3, 0, 1, 1),		/* SYS_0_PRESETN */

	DEF_RST(3, 6, 1, 7),		/* ICU_0_PRESETN_I */

	DEF_RST(3, 8, 1, 9),		/* GIC_0_GICRESET_N */

	DEF_RST(3, 9, 1, 10),		/* GIC_0_DBG_GICRESET_N */

	DEF_RST(7, 6, 3, 7),		/* WDT_1_RESET */