Commit 5a259f8e authored by Jesse Brandeburg's avatar Jesse Brandeburg Committed by Tony Nguyen
Browse files

ice: field get conversion 



Refactor the ice driver to use FIELD_GET() for mask and shift reads,
which reduces lines of code and adds clarity of intent.

This code was generated by the following coccinelle/spatch script and
then manually repaired.

@get@
constant shift,mask;
type T;
expression a;
@@
-(((T)(a) & mask) >> shift)
+FIELD_GET(mask, a)

and applied via:
spatch --sp-file field_prep.cocci --in-place --dir \
 drivers/net/ethernet/intel/

CC: Alexander Lobakin <aleksander.lobakin@intel.com>
Cc: Julia Lawall <Julia.Lawall@inria.fr>
Reviewed-by: default avatarMarcin Szycik <marcin.szycik@linux.intel.com>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Signed-off-by: default avatarJesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent 65db56d5

drivers/net/ethernet/intel/ice/ice_base.c

+4 −8
Original line number Diff line number Diff line
@@ -232,14 +232,10 @@ static void ice_cfg_itr_gran(struct ice_hw *hw) 


	/* no need to update global register if ITR gran is already set */

	if (!(regval & GLINT_CTL_DIS_AUTOMASK_M) &&

	    (((regval & GLINT_CTL_ITR_GRAN_200_M) >>

	     GLINT_CTL_ITR_GRAN_200_S) == ICE_ITR_GRAN_US) &&

	    (((regval & GLINT_CTL_ITR_GRAN_100_M) >>

	     GLINT_CTL_ITR_GRAN_100_S) == ICE_ITR_GRAN_US) &&

	    (((regval & GLINT_CTL_ITR_GRAN_50_M) >>

	     GLINT_CTL_ITR_GRAN_50_S) == ICE_ITR_GRAN_US) &&

	    (((regval & GLINT_CTL_ITR_GRAN_25_M) >>

	      GLINT_CTL_ITR_GRAN_25_S) == ICE_ITR_GRAN_US))

	    (FIELD_GET(GLINT_CTL_ITR_GRAN_200_M, regval) == ICE_ITR_GRAN_US) &&

	    (FIELD_GET(GLINT_CTL_ITR_GRAN_100_M, regval) == ICE_ITR_GRAN_US) &&

	    (FIELD_GET(GLINT_CTL_ITR_GRAN_50_M, regval) == ICE_ITR_GRAN_US) &&

	    (FIELD_GET(GLINT_CTL_ITR_GRAN_25_M, regval) == ICE_ITR_GRAN_US))

		return;



	regval = FIELD_PREP(GLINT_CTL_ITR_GRAN_200_M, ICE_ITR_GRAN_US) |

drivers/net/ethernet/intel/ice/ice_common.c

+8 −11
Original line number Diff line number Diff line
@@ -942,9 +942,8 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw) 
 */

static void ice_get_itr_intrl_gran(struct ice_hw *hw)

{

	u8 max_agg_bw = (rd32(hw, GL_PWR_MODE_CTL) &

			 GL_PWR_MODE_CTL_CAR_MAX_BW_M) >>

			GL_PWR_MODE_CTL_CAR_MAX_BW_S;

	u8 max_agg_bw = FIELD_GET(GL_PWR_MODE_CTL_CAR_MAX_BW_M,

				  rd32(hw, GL_PWR_MODE_CTL));



	switch (max_agg_bw) {

	case ICE_MAX_AGG_BW_200G:
@@ -976,9 +975,7 @@ int ice_init_hw(struct ice_hw *hw) 
	if (status)

		return status;



	hw->pf_id = (u8)(rd32(hw, PF_FUNC_RID) &

			 PF_FUNC_RID_FUNC_NUM_M) >>

		PF_FUNC_RID_FUNC_NUM_S;

	hw->pf_id = FIELD_GET(PF_FUNC_RID_FUNC_NUM_M, rd32(hw, PF_FUNC_RID));



	status = ice_reset(hw, ICE_RESET_PFR);

	if (status)
@@ -1163,8 +1160,8 @@ int ice_check_reset(struct ice_hw *hw) 
	 * or EMPR has occurred. The grst delay value is in 100ms units.

	 * Add 1sec for outstanding AQ commands that can take a long time.

	 */

	grst_timeout = ((rd32(hw, GLGEN_RSTCTL) & GLGEN_RSTCTL_GRSTDEL_M) >>

			GLGEN_RSTCTL_GRSTDEL_S) + 10;

	grst_timeout = FIELD_GET(GLGEN_RSTCTL_GRSTDEL_M,

				 rd32(hw, GLGEN_RSTCTL)) + 10;



	for (cnt = 0; cnt < grst_timeout; cnt++) {

		mdelay(100);
@@ -2248,7 +2245,7 @@ ice_parse_1588_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p, 
	info->tmr_index_owned = ((number & ICE_TS_TMR_IDX_OWND_M) != 0);

	info->tmr_index_assoc = ((number & ICE_TS_TMR_IDX_ASSOC_M) != 0);



	info->clk_freq = (number & ICE_TS_CLK_FREQ_M) >> ICE_TS_CLK_FREQ_S;

	info->clk_freq = FIELD_GET(ICE_TS_CLK_FREQ_M, number);

	info->clk_src = ((number & ICE_TS_CLK_SRC_M) != 0);



	if (info->clk_freq < NUM_ICE_TIME_REF_FREQ) {
@@ -2449,7 +2446,7 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, 
	info->tmr0_owned = ((number & ICE_TS_TMR0_OWND_M) != 0);

	info->tmr0_ena = ((number & ICE_TS_TMR0_ENA_M) != 0);



	info->tmr1_owner = (number & ICE_TS_TMR1_OWNR_M) >> ICE_TS_TMR1_OWNR_S;

	info->tmr1_owner = FIELD_GET(ICE_TS_TMR1_OWNR_M, number);

	info->tmr1_owned = ((number & ICE_TS_TMR1_OWND_M) != 0);

	info->tmr1_ena = ((number & ICE_TS_TMR1_ENA_M) != 0);
@@ -5773,7 +5770,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo, 
		ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");

		return status;

	}

	ldo->options = buf & ICE_LINK_OVERRIDE_OPT_M;

	ldo->options = FIELD_GET(ICE_LINK_OVERRIDE_OPT_M, buf);

	ldo->phy_config = (buf & ICE_LINK_OVERRIDE_PHY_CFG_M) >>

		ICE_LINK_OVERRIDE_PHY_CFG_S;

drivers/net/ethernet/intel/ice/ice_dcb.c

+30 −44
Original line number Diff line number Diff line
@@ -146,8 +146,7 @@ static u8 ice_get_dcbx_status(struct ice_hw *hw) 
	u32 reg;



	reg = rd32(hw, PRTDCB_GENS);

	return (u8)((reg & PRTDCB_GENS_DCBX_STATUS_M) >>

		    PRTDCB_GENS_DCBX_STATUS_S);

	return FIELD_GET(PRTDCB_GENS_DCBX_STATUS_M, reg);

}



/**
@@ -173,11 +172,9 @@ ice_parse_ieee_ets_common_tlv(u8 *buf, struct ice_dcb_ets_cfg *ets_cfg) 
	 */

	for (i = 0; i < 4; i++) {

		ets_cfg->prio_table[i * 2] =

			((buf[offset] & ICE_IEEE_ETS_PRIO_1_M) >>

			 ICE_IEEE_ETS_PRIO_1_S);

			FIELD_GET(ICE_IEEE_ETS_PRIO_1_M, buf[offset]);

		ets_cfg->prio_table[i * 2 + 1] =

			((buf[offset] & ICE_IEEE_ETS_PRIO_0_M) >>

			 ICE_IEEE_ETS_PRIO_0_S);

			FIELD_GET(ICE_IEEE_ETS_PRIO_0_M, buf[offset]);

		offset++;

	}
@@ -221,11 +218,9 @@ ice_parse_ieee_etscfg_tlv(struct ice_lldp_org_tlv *tlv, 
	 * |1bit | 1bit|3 bits|3bits|

	 */

	etscfg = &dcbcfg->etscfg;

	etscfg->willing = ((buf[0] & ICE_IEEE_ETS_WILLING_M) >>

			   ICE_IEEE_ETS_WILLING_S);

	etscfg->cbs = ((buf[0] & ICE_IEEE_ETS_CBS_M) >> ICE_IEEE_ETS_CBS_S);

	etscfg->maxtcs = ((buf[0] & ICE_IEEE_ETS_MAXTC_M) >>

			  ICE_IEEE_ETS_MAXTC_S);

	etscfg->willing = FIELD_GET(ICE_IEEE_ETS_WILLING_M, buf[0]);

	etscfg->cbs = FIELD_GET(ICE_IEEE_ETS_CBS_M, buf[0]);

	etscfg->maxtcs = FIELD_GET(ICE_IEEE_ETS_MAXTC_M, buf[0]);



	/* Begin parsing at Priority Assignment Table (offset 1 in buf) */

	ice_parse_ieee_ets_common_tlv(&buf[1], etscfg);
@@ -267,11 +262,9 @@ ice_parse_ieee_pfccfg_tlv(struct ice_lldp_org_tlv *tlv, 
	 * -----------------------------------------

	 * |1bit | 1bit|2 bits|4bits| 1 octet      |

	 */

	dcbcfg->pfc.willing = ((buf[0] & ICE_IEEE_PFC_WILLING_M) >>

			       ICE_IEEE_PFC_WILLING_S);

	dcbcfg->pfc.mbc = ((buf[0] & ICE_IEEE_PFC_MBC_M) >> ICE_IEEE_PFC_MBC_S);

	dcbcfg->pfc.pfccap = ((buf[0] & ICE_IEEE_PFC_CAP_M) >>

			      ICE_IEEE_PFC_CAP_S);

	dcbcfg->pfc.willing = FIELD_GET(ICE_IEEE_PFC_WILLING_M, buf[0]);

	dcbcfg->pfc.mbc = FIELD_GET(ICE_IEEE_PFC_MBC_M, buf[0]);

	dcbcfg->pfc.pfccap = FIELD_GET(ICE_IEEE_PFC_CAP_M, buf[0]);

	dcbcfg->pfc.pfcena = buf[1];

}
@@ -293,7 +286,7 @@ ice_parse_ieee_app_tlv(struct ice_lldp_org_tlv *tlv, 
	u8 *buf;



	typelen = ntohs(tlv->typelen);

	len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);

	len = FIELD_GET(ICE_LLDP_TLV_LEN_M, typelen);

	buf = tlv->tlvinfo;



	/* Removing sizeof(ouisubtype) and reserved byte from len.
@@ -313,12 +306,10 @@ ice_parse_ieee_app_tlv(struct ice_lldp_org_tlv *tlv, 
	 *        -----------------------------------------

	 */

	while (offset < len) {

		dcbcfg->app[i].priority = ((buf[offset] &

					    ICE_IEEE_APP_PRIO_M) >>

					   ICE_IEEE_APP_PRIO_S);

		dcbcfg->app[i].selector = ((buf[offset] &

					    ICE_IEEE_APP_SEL_M) >>

					   ICE_IEEE_APP_SEL_S);

		dcbcfg->app[i].priority = FIELD_GET(ICE_IEEE_APP_PRIO_M,

						    buf[offset]);

		dcbcfg->app[i].selector = FIELD_GET(ICE_IEEE_APP_SEL_M,

						    buf[offset]);

		dcbcfg->app[i].prot_id = (buf[offset + 1] << 0x8) |

			buf[offset + 2];

		/* Move to next app */
@@ -346,8 +337,7 @@ ice_parse_ieee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg) 
	u8 subtype;



	ouisubtype = ntohl(tlv->ouisubtype);

	subtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>

		       ICE_LLDP_TLV_SUBTYPE_S);

	subtype = FIELD_GET(ICE_LLDP_TLV_SUBTYPE_M, ouisubtype);

	switch (subtype) {

	case ICE_IEEE_SUBTYPE_ETS_CFG:

		ice_parse_ieee_etscfg_tlv(tlv, dcbcfg);
@@ -398,11 +388,9 @@ ice_parse_cee_pgcfg_tlv(struct ice_cee_feat_tlv *tlv, 
	 */

	for (i = 0; i < 4; i++) {

		etscfg->prio_table[i * 2] =

			((buf[offset] & ICE_CEE_PGID_PRIO_1_M) >>

			 ICE_CEE_PGID_PRIO_1_S);

			FIELD_GET(ICE_CEE_PGID_PRIO_1_M, buf[offset]);

		etscfg->prio_table[i * 2 + 1] =

			((buf[offset] & ICE_CEE_PGID_PRIO_0_M) >>

			 ICE_CEE_PGID_PRIO_0_S);

			FIELD_GET(ICE_CEE_PGID_PRIO_0_M, buf[offset]);

		offset++;

	}
@@ -465,7 +453,7 @@ ice_parse_cee_app_tlv(struct ice_cee_feat_tlv *tlv, struct ice_dcbx_cfg *dcbcfg) 
	u8 i;



	typelen = ntohs(tlv->hdr.typelen);

	len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);

	len = FIELD_GET(ICE_LLDP_TLV_LEN_M, typelen);



	dcbcfg->numapps = len / sizeof(*app);

	if (!dcbcfg->numapps)
@@ -520,14 +508,13 @@ ice_parse_cee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg) 
	u32 ouisubtype;



	ouisubtype = ntohl(tlv->ouisubtype);

	subtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>

		       ICE_LLDP_TLV_SUBTYPE_S);

	subtype = FIELD_GET(ICE_LLDP_TLV_SUBTYPE_M, ouisubtype);

	/* Return if not CEE DCBX */

	if (subtype != ICE_CEE_DCBX_TYPE)

		return;



	typelen = ntohs(tlv->typelen);

	tlvlen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);

	tlvlen = FIELD_GET(ICE_LLDP_TLV_LEN_M, typelen);

	len = sizeof(tlv->typelen) + sizeof(ouisubtype) +

		sizeof(struct ice_cee_ctrl_tlv);

	/* Return if no CEE DCBX Feature TLVs */
@@ -539,9 +526,8 @@ ice_parse_cee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg) 
		u16 sublen;



		typelen = ntohs(sub_tlv->hdr.typelen);

		sublen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);

		subtype = (u8)((typelen & ICE_LLDP_TLV_TYPE_M) >>

			       ICE_LLDP_TLV_TYPE_S);

		sublen = FIELD_GET(ICE_LLDP_TLV_LEN_M, typelen);

		subtype = FIELD_GET(ICE_LLDP_TLV_TYPE_M, typelen);

		switch (subtype) {

		case ICE_CEE_SUBTYPE_PG_CFG:

			ice_parse_cee_pgcfg_tlv(sub_tlv, dcbcfg);
@@ -578,7 +564,7 @@ ice_parse_org_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg) 
	u32 oui;



	ouisubtype = ntohl(tlv->ouisubtype);

	oui = ((ouisubtype & ICE_LLDP_TLV_OUI_M) >> ICE_LLDP_TLV_OUI_S);

	oui = FIELD_GET(ICE_LLDP_TLV_OUI_M, ouisubtype);

	switch (oui) {

	case ICE_IEEE_8021QAZ_OUI:

		ice_parse_ieee_tlv(tlv, dcbcfg);
@@ -615,8 +601,8 @@ static int ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg) 
	tlv = (struct ice_lldp_org_tlv *)lldpmib;

	while (1) {

		typelen = ntohs(tlv->typelen);

		type = ((typelen & ICE_LLDP_TLV_TYPE_M) >> ICE_LLDP_TLV_TYPE_S);

		len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);

		type = FIELD_GET(ICE_LLDP_TLV_TYPE_M, typelen);

		len = FIELD_GET(ICE_LLDP_TLV_LEN_M, typelen);

		offset += sizeof(typelen) + len;



		/* END TLV or beyond LLDPDU size */
@@ -805,11 +791,11 @@ ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg, 
	 */

	for (i = 0; i < ICE_MAX_TRAFFIC_CLASS / 2; i++) {

		dcbcfg->etscfg.prio_table[i * 2] =

			((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_0_M) >>

			 ICE_CEE_PGID_PRIO_0_S);

			FIELD_GET(ICE_CEE_PGID_PRIO_0_M,

				  cee_cfg->oper_prio_tc[i]);

		dcbcfg->etscfg.prio_table[i * 2 + 1] =

			((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_1_M) >>

			 ICE_CEE_PGID_PRIO_1_S);

			FIELD_GET(ICE_CEE_PGID_PRIO_1_M,

				  cee_cfg->oper_prio_tc[i]);

	}



	ice_for_each_traffic_class(i) {
@@ -1482,7 +1468,7 @@ ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg) 
	while (1) {

		ice_add_dcb_tlv(tlv, dcbcfg, tlvid++);

		typelen = ntohs(tlv->typelen);

		len = (typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S;

		len = FIELD_GET(ICE_LLDP_TLV_LEN_M, typelen);

		if (len)

			offset += len + 2;

		/* END TLV or beyond LLDPDU size */

drivers/net/ethernet/intel/ice/ice_dcb_nl.c

+1 −1
Original line number Diff line number Diff line
@@ -227,7 +227,7 @@ static void ice_get_pfc_delay(struct ice_hw *hw, u16 *delay) 
	u32 val;



	val = rd32(hw, PRTDCB_GENC);

	*delay = (u16)((val & PRTDCB_GENC_PFCLDA_M) >> PRTDCB_GENC_PFCLDA_S);

	*delay = FIELD_GET(PRTDCB_GENC_PFCLDA_M, val);

}



/**

drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c

+1 −2
Original line number Diff line number Diff line
@@ -503,8 +503,7 @@ ice_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 
		return -EINVAL;



	data->flex_word = value & ICE_USERDEF_FLEX_WORD_M;

	data->flex_offset = (value & ICE_USERDEF_FLEX_OFFS_M) >>

			     ICE_USERDEF_FLEX_OFFS_S;

	data->flex_offset = FIELD_GET(ICE_USERDEF_FLEX_OFFS_M, value);

	if (data->flex_offset > ICE_USERDEF_FLEX_MAX_OFFS_VAL)

		return -EINVAL;