Commit 5b2a16ab authored by Loic Poulain's avatar Loic Poulain Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: monaco: Fix UART10 pinconf 



UART10 RTS and TX pins were incorrectly mapped to gpio84 and gpio85.
Correct them to gpio85 (RTS) and gpio86 (TX) to match the hardware
I/O mapping.

Fixes: 467284a3 ("arm64: dts: qcom: qcs8300: Add QUPv3 configuration")
Signed-off-by: default avatarLoic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260202155611.1568-1-loic.poulain@oss.qualcomm.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent b7df21c5

arch/arm64/boot/dts/qcom/monaco.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -6414,12 +6414,12 @@ qup_uart10_cts: qup-uart10-cts-state { 
			};



			qup_uart10_rts: qup-uart10-rts-state {

				pins = "gpio84";

				pins = "gpio85";

				function = "qup1_se2";

			};



			qup_uart10_tx: qup-uart10-tx-state {

				pins = "gpio85";

				pins = "gpio86";

				function = "qup1_se2";

			};