Loading .mailmap +4 −0 Original line number Diff line number Diff line Loading @@ -226,6 +226,7 @@ Fangrui Song <i@maskray.me> <maskray@google.com> Felipe W Damasio <felipewd@terra.com.br> Felix Kuhling <fxkuehl@gmx.de> Felix Moeller <felix@derklecks.de> Feng Tang <feng.79.tang@gmail.com> <feng.tang@intel.com> Fenglin Wu <quic_fenglinw@quicinc.com> <fenglinw@codeaurora.org> Filipe Lautert <filipe@icewall.org> Finn Thain <fthain@linux-m68k.org> <fthain@telegraphics.com.au> Loading Loading @@ -317,6 +318,8 @@ Jayachandran C <c.jayachandran@gmail.com> <jnair@caviumnetworks.com> Jean Tourrilhes <jt@hpl.hp.com> Jeevan Shriram <quic_jshriram@quicinc.com> <jshriram@codeaurora.org> Jeff Garzik <jgarzik@pretzel.yyz.us> Jeff Johnson <jeff.johnson@oss.qualcomm.com> <jjohnson@codeaurora.org> Jeff Johnson <jeff.johnson@oss.qualcomm.com> <quic_jjohnson@quicinc.com> Jeff Layton <jlayton@kernel.org> <jlayton@poochiereds.net> Jeff Layton <jlayton@kernel.org> <jlayton@primarydata.com> Jeff Layton <jlayton@kernel.org> <jlayton@redhat.com> Loading Loading @@ -531,6 +534,7 @@ Nicholas Piggin <npiggin@gmail.com> <npiggin@kernel.dk> Nicholas Piggin <npiggin@gmail.com> <npiggin@suse.de> Nicholas Piggin <npiggin@gmail.com> <nickpiggin@yahoo.com.au> Nicholas Piggin <npiggin@gmail.com> <piggin@cyberone.com.au> Nick Desaulniers <nick.desaulniers+lkml@gmail.com> <ndesaulniers@google.com> Nicolas Ferre <nicolas.ferre@microchip.com> <nicolas.ferre@atmel.com> Nicolas Pitre <nico@fluxnic.net> <nicolas.pitre@linaro.org> Nicolas Pitre <nico@fluxnic.net> <nico@linaro.org> Loading Documentation/arch/arm64/gcs.rst +1 −1 Original line number Diff line number Diff line Loading @@ -37,7 +37,7 @@ intended to be exhaustive. shadow stacks rather than GCS. * Support for GCS is reported to userspace via HWCAP_GCS in the aux vector AT_HWCAP2 entry. AT_HWCAP entry. * GCS is enabled per thread. While there is support for disabling GCS at runtime this should be done with great care. Loading Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +3 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ title: Qualcomm Graphics Clock & Reset Controller maintainers: - Taniya Das <quic_tdas@quicinc.com> - Imran Shaik <quic_imrashai@quicinc.com> description: | Qualcomm graphics clock control module provides the clocks, resets and power Loading @@ -23,10 +24,12 @@ description: | include/dt-bindings/clock/qcom,gpucc-sm8150.h include/dt-bindings/clock/qcom,gpucc-sm8250.h include/dt-bindings/clock/qcom,gpucc-sm8350.h include/dt-bindings/clock/qcom,qcs8300-gpucc.h properties: compatible: enum: - qcom,qcs8300-gpucc - qcom,sdm845-gpucc - qcom,sa8775p-gpucc - qcom,sc7180-gpucc Loading Documentation/devicetree/bindings/clock/qcom,sa8775p-camcc.yaml +5 −1 Original line number Diff line number Diff line Loading @@ -8,16 +8,20 @@ title: Qualcomm Camera Clock & Reset Controller on SA8775P maintainers: - Taniya Das <quic_tdas@quicinc.com> - Imran Shaik <quic_imrashai@quicinc.com> description: | Qualcomm camera clock control module provides the clocks, resets and power domains on SA8775p. See also: include/dt-bindings/clock/qcom,sa8775p-camcc.h See also: include/dt-bindings/clock/qcom,qcs8300-camcc.h include/dt-bindings/clock/qcom,sa8775p-camcc.h properties: compatible: enum: - qcom,qcs8300-camcc - qcom,sa8775p-camcc clocks: Loading Documentation/devicetree/bindings/clock/qcom,sa8775p-videocc.yaml +1 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ description: | properties: compatible: enum: - qcom,qcs8300-videocc - qcom,sa8775p-videocc clocks: Loading Loading
.mailmap +4 −0 Original line number Diff line number Diff line Loading @@ -226,6 +226,7 @@ Fangrui Song <i@maskray.me> <maskray@google.com> Felipe W Damasio <felipewd@terra.com.br> Felix Kuhling <fxkuehl@gmx.de> Felix Moeller <felix@derklecks.de> Feng Tang <feng.79.tang@gmail.com> <feng.tang@intel.com> Fenglin Wu <quic_fenglinw@quicinc.com> <fenglinw@codeaurora.org> Filipe Lautert <filipe@icewall.org> Finn Thain <fthain@linux-m68k.org> <fthain@telegraphics.com.au> Loading Loading @@ -317,6 +318,8 @@ Jayachandran C <c.jayachandran@gmail.com> <jnair@caviumnetworks.com> Jean Tourrilhes <jt@hpl.hp.com> Jeevan Shriram <quic_jshriram@quicinc.com> <jshriram@codeaurora.org> Jeff Garzik <jgarzik@pretzel.yyz.us> Jeff Johnson <jeff.johnson@oss.qualcomm.com> <jjohnson@codeaurora.org> Jeff Johnson <jeff.johnson@oss.qualcomm.com> <quic_jjohnson@quicinc.com> Jeff Layton <jlayton@kernel.org> <jlayton@poochiereds.net> Jeff Layton <jlayton@kernel.org> <jlayton@primarydata.com> Jeff Layton <jlayton@kernel.org> <jlayton@redhat.com> Loading Loading @@ -531,6 +534,7 @@ Nicholas Piggin <npiggin@gmail.com> <npiggin@kernel.dk> Nicholas Piggin <npiggin@gmail.com> <npiggin@suse.de> Nicholas Piggin <npiggin@gmail.com> <nickpiggin@yahoo.com.au> Nicholas Piggin <npiggin@gmail.com> <piggin@cyberone.com.au> Nick Desaulniers <nick.desaulniers+lkml@gmail.com> <ndesaulniers@google.com> Nicolas Ferre <nicolas.ferre@microchip.com> <nicolas.ferre@atmel.com> Nicolas Pitre <nico@fluxnic.net> <nicolas.pitre@linaro.org> Nicolas Pitre <nico@fluxnic.net> <nico@linaro.org> Loading
Documentation/arch/arm64/gcs.rst +1 −1 Original line number Diff line number Diff line Loading @@ -37,7 +37,7 @@ intended to be exhaustive. shadow stacks rather than GCS. * Support for GCS is reported to userspace via HWCAP_GCS in the aux vector AT_HWCAP2 entry. AT_HWCAP entry. * GCS is enabled per thread. While there is support for disabling GCS at runtime this should be done with great care. Loading
Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +3 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ title: Qualcomm Graphics Clock & Reset Controller maintainers: - Taniya Das <quic_tdas@quicinc.com> - Imran Shaik <quic_imrashai@quicinc.com> description: | Qualcomm graphics clock control module provides the clocks, resets and power Loading @@ -23,10 +24,12 @@ description: | include/dt-bindings/clock/qcom,gpucc-sm8150.h include/dt-bindings/clock/qcom,gpucc-sm8250.h include/dt-bindings/clock/qcom,gpucc-sm8350.h include/dt-bindings/clock/qcom,qcs8300-gpucc.h properties: compatible: enum: - qcom,qcs8300-gpucc - qcom,sdm845-gpucc - qcom,sa8775p-gpucc - qcom,sc7180-gpucc Loading
Documentation/devicetree/bindings/clock/qcom,sa8775p-camcc.yaml +5 −1 Original line number Diff line number Diff line Loading @@ -8,16 +8,20 @@ title: Qualcomm Camera Clock & Reset Controller on SA8775P maintainers: - Taniya Das <quic_tdas@quicinc.com> - Imran Shaik <quic_imrashai@quicinc.com> description: | Qualcomm camera clock control module provides the clocks, resets and power domains on SA8775p. See also: include/dt-bindings/clock/qcom,sa8775p-camcc.h See also: include/dt-bindings/clock/qcom,qcs8300-camcc.h include/dt-bindings/clock/qcom,sa8775p-camcc.h properties: compatible: enum: - qcom,qcs8300-camcc - qcom,sa8775p-camcc clocks: Loading
Documentation/devicetree/bindings/clock/qcom,sa8775p-videocc.yaml +1 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ description: | properties: compatible: enum: - qcom,qcs8300-videocc - qcom,sa8775p-videocc clocks: Loading